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Inventor: Kasuya; Yoshikazu
Address: Sakutu, JP
No. of patents: 2
Patents:
| Patent Number |
Title Of Patent |
Date Issued |
| 6784078 |
Methods for manufacturing semiconductor devices and semiconductor devices |
August 31, 2004 |
| Semiconductor devices and methods for manufacturing the same in which deterioration of the electrical characteristic is suppressed are described. One method for manufacturing a semiconductor device includes the steps of: forming a first polysilicon layer 32 on a gate dielectric layer |
| 6528414 |
Methods for forming wiring line structures in semiconductor devices |
March 4, 2003 |
| Embodiments include a manufacturing method for a semiconductor device which can suppress a concave from being generated in an upper area of a wiring layer at a position above plug. The method may include the steps of (a) forming an impurity diffusion layer 34; (b) forming, on the impurit |
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