| Patent Number |
Title Of Patent |
Date Issued |
| 6645803 |
Method for modifying the doping level of a silicon layer |
November 11, 2003 |
| A method for modifying the doping level of a doped silicon layer including the steps of coating the silicon layer with a silicide layer made of a refractory metal, and heating the interface region between the silicon and the silicide to a predetermined temperature. The method may be appl |
| 5811330 |
Method of fabricating an overvoltage protection device in integrated circuits |
September 22, 1998 |
| An overvoltage protection device, for inclusion within an integrated circuit, which comprises at least two conductive elements separated by a gas filled gap. |
| 5786613 |
Integrated overvoltage protection device having electrodes separated by a gas-filled cavity |
July 28, 1998 |
| An overvoltage protection device, for inclusion within an integrated circuit, which comprises at least two conductive elements separated by a gas filled gap. |
| 5633178 |
Method of making volatile memory cell with interface charge traps |
May 27, 1997 |
| A semiconductor device is described, incorporating electron traps at the interface between a semiconductor substrate and a gate dielectric layer of an insulated gate field effect transistor, such device being capable of retaining charge in the electron traps for a certain time, allowing |
| 5608250 |
Volatile memory cell with interface charge traps |
March 4, 1997 |
| A semiconductor device is described, incorporating electron traps at the interface between a semiconductor substrate and a gate dielectric layer of an insulated gate field effect transistor, such device being capable of retaining charge in the electron traps for a certain time, allowing |
