| Patent Number |
Title Of Patent |
Date Issued |
| 7554163 |
Semiconductor device |
June 30, 2009 |
| A first semiconductor region has a smaller width along a gate length direction than a second semiconductor region. In this case, the first semiconductor region has a larger width along a gate width direction than the second semiconductor region. |
| 7495295 |
Semiconductor device and method for fabricating the same |
February 24, 2009 |
| In a semiconductor device according to the present invention, the power source voltage Vdd1 of a core transistor Tr1, the power source voltage Vdd2 of an I/O transistor Tr2, and the power source voltage Vdd3 of an I/O transistor Tr3 satisfy Vdd1<Vdd2<Vdd3. In a method for fabri |
| 7279727 |
Semiconductor device |
October 9, 2007 |
| A semiconductor device includes a semiconductor substrate; a diffusion region which is formed in the semiconductor substrate and serves as a region for the formation of a MIS transistor; an element isolation region surrounding the diffusion region; at least one gate conductor film which |
| 7067382 |
Semiconductor device and method for fabricating the same |
June 27, 2006 |
| As first thermal treatment for activating an impurity injected into a gate electrode, thermal treatment at a low temperature for a long time in which boron diffusion into each crystal grain in polysilicon hardly occurs and boron diffusion in each crystal boundary occurs is performed. |
| 7042007 |
Semiconductor device and method for evaluating characteristics of the same |
May 9, 2006 |
| A single evaluation portion is formed by disposing a plurality of MIS transistors used for evaluation having substantially the same structure as that of an actually used MIS transistor. In the evaluation portion, the respective source regions, drain regions, and gate electrodes of the |
