| Patent Number |
Title Of Patent |
Date Issued |
| 8036333 |
Clock and data recovery circuit and method of recovering clocks and data |
October 11, 2011 |
| A clock and data recovery circuit that does not use a reference clock and a method of recovering cocks and data, in which the clock and data recovery circuit includes a clock generation unit, a mirror delay unit, a preamble phase detection unit, and a sampling unit. The clock generation |
| 7508245 |
Lock detector and delay-locked loop having the same |
March 24, 2009 |
| A lock detector of a delay-locked loop (DLL) includes a lock detection unit and a bias unit. The lock detection unit generates a charge control signal based on a reference current received from an external source and a plurality of delay signals received from an external voltage-controll |
| 7400182 |
Clock generator with one pole and method for generating a clock |
July 15, 2008 |
| A clock generator based on a phase-locked loop with one pole and an improved period jitter characteristic is disclosed. The clock generator comprises a phase detector for generating a phase detection signal and a phase error signal, a charge pump for generating a loop control voltage, |
| 7116145 |
Phase-locked loop circuit having phase lock detection function and method for detecting phase lo |
October 3, 2006 |
| A phase-locked loop circuit including a lock detection function is disclosed. The phase-locked loop circuit comprises a lock detection circuit. The lock detection circuit includes a lock-detection-start-signal generator, a lock-detection-clock generator, and a lock-detection-signal g |
| 7084682 |
Delay-locked loop circuit and method thereof for generating a clock signal |
August 1, 2006 |
| A delay-locked loop circuit includes a phase frequency detector, a charge pump, a loop filter, a voltage controlled delay line and a coarse lock detector. The phase frequency detector generates an up signal and a down signal corresponding to phase and frequency differences between an inp |
