Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Ichimura; Teruhiko
Address:
Kanagawa, JP
No. of patents:
2
Patents:












Patent Number Title Of Patent Date Issued
7163895 Polishing method January 16, 2007
The present invention is relates to a polishing method for polishing a semiconductor wafer (W) by pressing the semiconductor wafer (W) against a polishing surface (10) with use of a top ring (23) for holding the semiconductor wafer (W). A pressure chamber (70) is defined in the top r
5496749 Method of manufacturing thin film transistors in a liquid crystal display apparatus March 5, 1996
A first sheet of photomask is used when a gate electrode and a gate bus line are formed, a second sheet of photomask is used when patterning is applied to a semiconductor film which becomes an active layer of a transistor on the gate electrode, a third sheet of photomask is used when










 
 
  Recently Added Patents
Ion implantation method and ion implantation apparatus
Channel marking for chip mark overflow and calibration errors
Crosslinked core/shell polymer particles
Meat-containing, strip shaped food product and method of making same
Antimicrobial flush solutions
System and method for the analysis of biodiesel
Radiation protective garment with forced ventilation and method
  Randomly Featured Patents
Tone generation apparatus
Metering of two-phase fluids using flow homogenizing devices and chemicals
Method for transmitting a digital data stream, transmitter, method for receiving a digital data stream and receiver
Device rack
Filter-bag for infusion products
Splice-in-register control
Switch with one-bit resolution
Electric machine
Turbo-compound engine
Substrate of improved plasma sprayed surface morphology and its use as an electrode in an electrolytic cell