| Patent Number |
Title Of Patent |
Date Issued |
| 7565658 |
Hidden job start preparation in an instruction-parallel processor system |
July 21, 2009 |
| The read latency caused by job start preparation of a future job is at least partly hidden within the current job by reading information for job start preparation of the future job integrated with the execution of the current job. Instructions for job start preparation are preferably |
| 7545646 |
Cooling assembly |
June 9, 2009 |
| A cooling assembly and method of cooling a heat-generating electronic component on a circuit board. A heat collector collects heat from the electronic component. A heat pipe transfers the heat to a location remote from the electronic component. A heat sink is mounted to the circuit b |
| 6865736 |
Static cache |
March 8, 2005 |
| The present invention discloses a processor system comprising a processor (31) and at least a first memory (32) and a second memory (34, 36, 37). The first memory (32) is normally faster than the second one, and means for memory allocation (38, 41, 48) perform the periodically static |
| 6714961 |
Multiple job signals per processing unit in a multiprocessing system |
March 30, 2004 |
| The invention is directed toward a multiprocessing system having multiple processing units. For at least one of the processing units in the multiprocessing system, a first job signal is assigned to the processing unit for speculative execution of a corresponding first job, and a further |
| 6665708 |
Coarse grained determination of data dependence between parallel executed jobs in an information |
December 16, 2003 |
| A computer system performs a coarse-grained dependency checking between concurrently executed jobs that share a memory. First and second jobs are defined, each having a set of shared individually addressable data items stored in a corresponding set of locations within a memory. The set o |
| 6662203 |
Batch-wise handling of signals in a processing system |
December 9, 2003 |
| The present invention relates to multiprocessing systems in which signals or processes are scheduled in order of their priority level. The invention is based on batch-wise acceptance and scheduling of job signals, and utilizes at least one delay queue for temporarily storing job signals |
| 6539458 |
Hierarchical memory for efficient data exchange control |
March 25, 2003 |
| A data processing system and method involving a data requesting element and a first memory element from which said data requesting element requests data is described. An example of such a system is a processor and a first level cache memory, or two memories arranged in a hierarchy. A sec |
| 6457145 |
Fault detection in digital system |
September 24, 2002 |
| For fault testing in a digital system, a processor unit is made available from other activities and the logical units to be tested are set to a predetermined state. An output response analyze is activated and the processor unit generates a set of stimuli, influencing the appropriate |
| 6345351 |
Maintenance of speculative state of parallel executed jobs in an information processing system |
February 5, 2002 |
| A computer system uses paged memory mapping techniques to maintain speculative data generated by concurrent execution of speculative jobs. In some embodiments, a set of shared virtual pages is defined that stores data that are shared by a first job and a second job. A set of shared p |
| 6330701 |
Method relating to processors, and processors adapted to function in accordance with the method |
December 11, 2001 |
| The present invention relates to a method of utilizing information made available in a bit error check of data words belonging to instructions read into a processor having a first (11) and a second (11') calculating unit which operate in parallel with one another, a so-called double |
| 6279082 |
System and method for efficient use of cache to improve access to memory of page type |
August 21, 2001 |
| A method and system are described for improving memory access. The invention will improve memory access in systems where program code and data stored in memory have low locality. The invention builds on that the access to at least some addresses of the memory will take longer time than |
| 6247141 |
Protocol for providing replicated servers in a client-server system |
June 12, 2001 |
| A fault-tolerant client-server system has a primary server, a backup server; and a client. The client sends a request to the primary server, which receives and processes the request, including sending the response to the client, independent of any backup processing. The response includes |
