| Patent Number |
Title Of Patent |
Date Issued |
| 6414352 |
Semiconductor device having an electronically insulating layer including a nitride layer |
July 2, 2002 |
| A semiconductor device such as a flash EEPROM has oxide/nitride/oxide sandwich structure deposited on a semiconductor substrate. Optical lithography and plasma-assisted etching are used to remove portions of the structure that extend over active regions. Since the nitride layer of the |
| 6274432 |
Method of making contactless nonvolatile semiconductor memory device having buried bit lines sur |
August 14, 2001 |
| In a contactless nonvolatile semiconductor memory device including a semiconductor substrate and a plurality of impurity diffusion layers of a rectangular shape serving as sub bit lines on the semiconductor substrate, a plurality of grooves of a rectangular shape are formed in the se |
| 6214669 |
Single-chip contact-less read-only memory (ROM) device and the method for fabricating the device |
April 10, 2001 |
| To obtain a small contact-less memory device, a memory device includes a semiconductor chip having a first surface and a second surface located at a level lower than that of the first surface, a memory cell array formed on the second surface, a peripheral circuit, for operating the memor |
| 6121670 |
Single-chip contact-less read-only memory (ROM) device and the method for fabricating the device |
September 19, 2000 |
| To obtain a small contact-less memory device, a memory device includes a semiconductor chip having a first surface and a second surface located at a level lower than that of the first surface, a memory cell array formed on the second surface, a peripheral circuit, for operating the memor |
| 6057574 |
Contactless nonvolatile semiconductor memory device having buried bit lines surrounded by groove |
May 2, 2000 |
| In a contactless nonvolatile semiconductor memory device including a semiconductor substrate and a plurality of impurity diffusion layers of a rectangular shape serving as sub bit lines on the semiconductor substrate, a plurality of grooves of a rectangular shape are formed in the se |
| 6040234 |
Method of manufacturing semiconductor device without bird beak effect |
March 21, 2000 |
| In a method of manufacturing a semiconductor device, diffusion layers are formed on a semiconductor substrate using a mask. The diffusion layers has a conductive type different from that of the semiconductor substrate. Then, insulating films are formed on the diffusion layers using the m |
| 6010946 |
Semiconductor device with isolation insulating film tapered and method of manufacturing the same |
January 4, 2000 |
| In a method of a semiconductor device, an insulating film on a semiconductor substrate is formed. Then, a first mask on the insulating film in a first region is formed and the insulating film is removed using the first mask for isolation insulating films in the first region. In this |
| 5946240 |
Nonvolatile semiconductor memory device and method of manufacturing the same |
August 31, 1999 |
| In a nonvolatile semiconductor memory device, buried diffusion layers are stripped parallel to each other in a surface region of a semiconductor substrate of a first conductivity type, and constitute bit lines. A select-gate electrode is formed on the semiconductor substrate, between |
| 5929480 |
Nonvolatile semiconductor memory device having first and second floating gates |
July 27, 1999 |
| A nonvolatile semiconductor memory is composed of a number of multi-bit memory cells, each including a first floating gate and a second floating gate formed, side by side, and insulated from each other, on a first gate insulator film formed on a channel region defined between a source re |
| 5923978 |
Nonvolatile semiconductor memory and methods for manufacturing and using the same |
July 13, 1999 |
| A nonvolatile semiconductor memory is composed of a number of multi-bit memory cells, each including a first floating gate and a second floating gate formed, side by side, and insulated from each other, on a first gate insulator film formed on a channel region defined between a source re |
| 5891775 |
Method of making nonvolatile semiconductor device having sidewall split gate for compensating fo |
April 6, 1999 |
| In a nonvolatile semiconductor memory device, including a semiconductor substrate, a floating gate formed over the semiconductor substrate, and a control gate formed over the floating gate, a split gate is formed on a sidewall of the control gate and the floating gate and is electrically |
| 5863822 |
Method of making non-volatile semiconductor memory devices having large capacitance between floa |
January 26, 1999 |
| Disclosed herein is a stacked gate type non-volatile semiconductor memory cell including source/drain regions having a first portion covered with a tunnel oxide film and a second portion covered with an insulator film. The memory cell further includes a gate insulating film formed on a c |
