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Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Hiatt; William Mark
Address:
Eagle, ID
No. of patents:
12
Patents:












Patent Number Title Of Patent Date Issued
8294273 Methods for fabricating and filling conductive vias and conductive vias so formed October 23, 2012
Methods for forming conductive vias include forming one or more via holes in a substrate. The via holes may be formed with a single mask, with protective layers, bond pads, or other features of the substrate acting as hard masks in the event that a photomask is removed during etching
7892972 Methods for fabricating and filling conductive vias and conductive vias so formed February 22, 2011
Methods for forming conductive vias include forming one or more via holes in a substrate. The via holes may be formed with a single mask, with protective layers, bond pads, or other features of the substrate acting as hard masks in the event that a photomask is removed during etching
7709776 Microelectronic imagers with optical devices and methods of manufacturing such microelectronic i May 4, 2010
Microelectronic imager assemblies comprising a workpiece including a substrate and a plurality of imaging dies on and/or in the substrate. The substrate includes a front side and a back side, and the imaging dies comprise imaging sensors at the front side of the substrate and external
7632713 Methods of packaging microelectronic imaging devices December 15, 2009
Microelectronic imaging devices and methods of packaging microelectronic imaging devices are disclosed herein. In one embodiment, the microelectronic imaging devices include an interposer substrate and a plurality of imager units coupled to the interposer substrate. The interposer su
7504615 Microelectronic imagers with optical devices and methods of manufacturing such microelectronic i March 17, 2009
Microelectronic imager assemblies comprising a workpiece including a substrate and a plurality of imaging dies on and/or in the substrate. The substrate includes a front side and a back side, and the imaging dies comprise imaging sensors at the front side of the substrate and external
7470563 Microelectronic device packages and methods for controlling the disposition of non-conductive ma December 30, 2008
A microelectronic package and method for forming such a package. In one embodiment, the package can include a microelectronic substrate having first connection sites, and a support member having second connection sites and third connection sites, with the third connection sites acces
7452743 Microelectronic imaging units and methods of manufacturing microelectronic imaging units at the November 18, 2008
Microelectronic imaging units and methods for manufacturing a plurality of imaging units at the wafer level are disclosed herein. In one embodiment, a method for manufacturing a plurality of imaging units includes providing an imager workpiece having a plurality of imaging dies inclu
7265330 Microelectronic imagers with optical devices and methods of manufacturing such microelectronic i September 4, 2007
Microelectronic imager assemblies comprising a workpiece including a substrate and a plurality of imaging dies on and/or in the substrate. The substrate includes a front side and a back side, and the imaging dies comprise imaging sensors at the front side of the substrate and external
7189954 Microelectronic imagers with optical devices and methods of manufacturing such microelectronic i March 13, 2007
Microelectronic imager assemblies comprising a workpiece including a substrate and a plurality of imaging dies on and/or in the substrate. The substrate includes a front side and a back side, and the imaging dies comprise imaging sensors at the front side of the substrate and external
7087995 Microelectronic device packages and methods for controlling the disposition of non-conductive ma August 8, 2006
A microelectronic package and method for forming such a package. In one embodiment, the package can include a microelectronic substrate having first connection sites, and a support member having second connection sites and third connection sites, with the third connection sites acces
6673649 Microelectronic device packages and methods for controlling the disposition of non-conductive ma January 6, 2004
A microelectronic package and method for forming such a package. In one embodiment, the package can include a microelectronic substrate having first connection sites, and a support member having second connection sites and third connection sites, with the third connection sites acces
6663340 Wafer carrier transport system for tool bays December 16, 2003
A processing tool bay within a semiconductor fabrication site, including a plurality of semiconductor processing tools for processing wafers being arranged in two opposite rows. An intrabay transport system for transporting wafer carriers around the process tool bay at least in a ver










 
 
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