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Henson, Jr.; James D.
Austin, TX
No. of patents:

Patent Number Title Of Patent Date Issued
5448716 Apparatus and method for booting a multiple processor system having a global/local memory archit September 5, 1995
An architecture and method for booting a multi-processor system having processor local memory and shared global memory, with shared global memory access managed by an atomic memory access controller and cache coherence managed by software. Reset circuits are used to synchronize to a mast
5327548 Apparatus and method for steering spare bit in a multiple processor system having a global/local July 5, 1994
A system and method for managing spare bit steering information in a multi-processor system having a global/local memory architecture. During the system boot cycle one of the multiple processors is selected to test global memory and to configure the steering of the spare bits by bank or
5121501 First processor inserting hooks into software and sending unique identifications to output bus a June 9, 1992
A method and apparatus are disclosed for monitoring software applications within a first processor during development thereof. A limited number of uniquely identifiable elements or "hooks" are inserted into the software application under development and each time an element is encountere

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