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Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Hendricks; Charles J.
Address:
Wappingers Falls, NY
No. of patents:
9
Patents:












Patent Number Title Of Patent Date Issued
7808257 Ionization test for electrical verification October 5, 2010
A method and apparatus for the non-contact electrical test of both opens and shorts in electronic substrates. Top surface electrical test features are exposed to an ionization source under ambient conditions and the subsequent charge build up is measured as a drain current by probes
6984997 Method and system for testing multi-chip integrated circuit modules January 10, 2006
A system and method for utilizing a multi-probe tester to test an electrical device having a plurality of contact pads. Multi-probe tester test probes and electrical device contact pads are arrayed in a common distribution pitch, wherein at least one test probe is masked, thereby pre
6753688 Interconnect package cluster probe short removal apparatus and method June 22, 2004
A method and structure for an electronic circuit test and repair apparatus includes both of at least one wiring analyzer to locate circuit shorts and a current source to provide current sufficient to attempt to remove any identified shorts.
6281692 Interposer for maintaining temporary contact between a substrate and a test bed August 28, 2001
Disclosed is an interposer and test structure for making contact between a substrate and a test bed. One embodiment of the interposer has a floating, rigid conductive element in a nonconductive body which makes temporary contact between the test bed and the substrate. In another embodime
6235544 Seed metal delete process for thin film repair solutions using direct UV laser May 22, 2001
A multilayer thin film structure (MLTF) is provided having no extraneous via-pad connection strap plated metallurgy for defective vias needing removal. The method for making or repairing the MLTF comprises determining interconnection defects in the MLTF at a thin film layer adjacent to t
6054863 System for testing circuit board integrity April 25, 2000
A system for testing circuit boards comprising a probe network having a plurality of probes wherein each probe is adapted for contacting an end of a corresponding circuit board network and wherein each probe and network define a node having an address. The system further comprises a cont
4600464 Plasma etching reactor with reduced plasma potential July 15, 1986
An improved plasma reactor for uniformly etching a large number of semiconductor wafers at a reduced plasma potential includes, in one embodiment, a grounded plate mounted intermediate the cathode and the top plate of a reactor chamber, the top plate and the chamber walls forming the
4534816 Single wafer plasma etch reactor August 13, 1985
A high pressure, high etch rate single wafer plasma reactor having a fluid cooled upper electrode including a plurality of small diameter holes or passages therethrough to provide uniform reactive gas distribution over the surface of a wafer to be etched. A fluid cooled lower electrode i
4340461 Modified RIE chamber for uniform silicon etching July 20, 1982
A plasma enhancing baffle plate is employed in conjunction with the anode of an RIE system to provide uniform silicon etching. The baffle plate is conductively coupled to and provided in relatively close proximity to the anode to form a constricted chamber region between anode and baffle










 
 
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