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Inventor: Hatori; Makoto
Address: Fussa, JP
No. of patents: 5
Patents:
| Patent Number |
Title Of Patent |
Date Issued |
| 8129784 |
Semiconductor device |
March 6, 2012 |
| The invention improves the performance of a semiconductor device. A metal silicide film is formed by a silicide process on a gate electrode and an n.sup.+-type source region of an LDMOSFET, and no such metal silicide film is formed on an n.sup.--type offset drain region, an n-type offset |
| 7994567 |
Semiconductor device and a method of manufacturing the same |
August 9, 2011 |
| To reduce the size and improve the power added efficiency of an RF power module having an amplifier element composed of a silicon power MOSFET, the on resistance and feedback capacitance, which were conventionally in a trade-off relationship, are reduced simultaneously by forming the |
| 7791131 |
Semiconductor device and a method of manufacturing the same |
September 7, 2010 |
| To reduce the size and improve the power added efficiency of an RF power module having an amplifier element composed of a silicon power MOSFET, the on resistance and feedback capacitance, which were conventionally in a trade-off relationship, are reduced simultaneously by forming the |
| 7510941 |
Semiconductor device and manufacturing method of the same |
March 31, 2009 |
| The invention improves the performance of a semiconductor device. A metal silicide film is formed by a silicide process on a gate electrode and an n.sup.+-type source region of an LDMOSFET, and no such metal silicide film is formed on an n.sup.--type offset drain region, an n-type offset |
| 7176520 |
Semiconductor device and a method of manufacturing the same |
February 13, 2007 |
| To reduce the size and improve the power added efficiency of an RF power module having an amplifier element composed of a silicon power MOSFET, the on resistance and feedback capacitance, which were conventionally in a trade-off relationship, are reduced simultaneously by forming the |
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