Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Hanrahan; Shaila
Address:
San Jose, CA
No. of patents:
6
Patents:












Patent Number Title Of Patent Date Issued
6792588 Faster scalable floorplan which enables easier data control flow September 14, 2004
A floorplan for a reconfigurable chip uses slices adjacent to each of four corners of a region, each of the slices including tiles that contain multiple reconfigurable functional units including ALUs. The placement of the slices in the corners of their region allows for better and quicke
6657457 Data transfer on reconfigurable chip December 2, 2003
A reconfigurable chip having reconfigurable elements uses an interconnection system which reduces the maximum signal rise and fall time. In one embodiment, the maximum rise and fall time is reduced by providing bypass paths. In another embodiment, buffers are used to reduce signal ri
6392912 Loading data plane on reconfigurable chip May 21, 2002
A reconfigurable chip includes data registers which can be loaded from off-chip or on-chip. The data register comprises a register block produced from a number of register block units. The register bock units include an active plane store storing the current value of the register bit, at
6349346 Control fabric unit including associated configuration memory and PSOP state machine adapted to February 19, 2002
A reconfigurable system is arranged to have separate control and the data paths. The control path is set up using control fabric units which use an associated state machine to produce an address to a functional unit memory. The functional unit memory then produces the configuration data
6311200 Reconfigurable program sum of products generator October 30, 2001
A reconfigurable programmable sum of products generator allows for multiple configurations to be associated with a programmable sum of products generator. These configurations can be modified by changing the configurations in an associated configuration memory for the programmable su
6288566 Configuration state memory for functional blocks on a reconfigurable chip September 11, 2001
A configuration state memory is associated with a configurable functional block on a reconfigurable chip. The configuration state memory stores more than one configuration for the functional block. This allows the functional block to switch configurations without requiring the config










 
 
  Recently Added Patents
System and method for supporting fibre channel over ethernet communication
DMAPN having a low DGN content and a process for preparing DMAPA having a low DGN content
Horizontal card holder
Nanoparticle entrapment of materials
Method for determining an object class of an object, from which light is emitted and/or reflected to a vehicle
Channel estimating method and device
Support member, rotation device comprising such a support and rolling bearing assembly including such a detection device
  Randomly Featured Patents
Air fuel ratio control apparatus for internal combustion engine
Manufacturing a dental implant drill guide and a dental implant superstructure
Combined carrying bag and insulated container holder
Water-in-oil type emulson ink for stencil printing
Method and apparatus for locating a remote unit within a communication system
Diamines having a CaSR modulating activity
Method for sealing a hollow fiber membrane module in a case
Method for forming a salicide in semiconductor device
Candle holder
Porous, fibrous structures with thermoplastic fluorocarbon coating and method of making