| Patent Number |
Title Of Patent |
Date Issued |
| 7613224 |
Qualification and selection of the frequency channels for an adaptive frequency hopping method b |
November 3, 2009 |
| In a method for qualification of the transmission quality of a frequency channel in a wire-free communication system that has two or more frequency channels, units in the system communicate via the frequency channels. Data is transmitted in time slots in a time pattern using a time s |
| 7567626 |
Radio receiver for the reception of data bursts which are modulated with two modulation types |
July 28, 2009 |
| The invention relates to a radio receiver for the reception of a data burst which is transmitted by a transmitter, in which case the data burst includes a first section which has been modulated using a first modulation method at the transmitter end, and a second section which is tran |
| 7545885 |
Compensation for the carrier frequency offset in a receiving apparatus, which is designed for a |
June 9, 2009 |
| The present invention relates to a receiving apparatus for a mobile communications system which can be modulated using different modulation types at the transmitter end. According to one embodiment of the invention, in the middle of a data burst of a Bluetooth communications system, |
| 7529288 |
Channel qualification for an adaptive frequency hopping method by means of bit or packet error r |
May 5, 2009 |
| In a method for qualification of a frequency channel in a wire-free communication system, data is transmitted on different frequency channels by means of an adaptive frequency hopping method. The transmission and reception are carried out in time slots using a time slot method which is |
| 7526262 |
Converter circuit for a limiter receiver structure and method for converting a signal in a limit |
April 28, 2009 |
| The present invention relates generally to a converter circuit with a limiter to convert an analog reception signal into a value-discrete limiter signal. An evaluation circuit determines a zero crossing distance signal from the temporal distances between successive zero crossings of |
| 7502435 |
Two-point modulator arrangement and use thereof in a transmission arrangement and in a reception |
March 10, 2009 |
| The present invention provides a two-point modulator arrangement with a PLL that can be operated at various reference frequencies. A modulation signal provided by a digital signal processor is supplied as an analog signal at the input of the oscillator in the PLL and as a digital mod |
| 7483507 |
Method for resynchronization of a mobile radio receiver in the event of a changeover between two |
January 27, 2009 |
| When data bursts are transmitted between a base station and a mobile receiver, a changeover is made between a plurality of modulation methods during an existing radio link for modulation of the data. For resynchronization of the receiver in the event of the changeover, synchronizatio |
| 7453325 |
Single point modulator having a PLL circuit |
November 18, 2008 |
| A single-point modulator (1) has a PLL circuit (2) and a programmable frequency divider (7) whose control connection is connected to a circuit branch for injecting a digital modulation signal (15) which is arranged in the feedback path of the PLL circuit (2). The circuit branch contains |
| 7430265 |
Circuit arrangement provided with a phase-locked loop and transmitter-receiver with said circuit |
September 30, 2008 |
| The invention specifies a circuit arrangement with a phase locked loop (1), which can be used as a mobile radio transmitter, in particular. The reference frequency for the PLL (1), which is provided by means of the source (3), is multiplied by a multiplier (10) and is down-converted to |
| 7409567 |
Devices with reciprocal wake-up function from the standby mode |
August 5, 2008 |
| Apparatus (20) having two devices (21, 22) which can be connected to one another via an interface (23, 24), where the devices (21, 22) each have an activation unit which, upon receipt of a control signal at a control input, prompts the respective device (21, 22) to change over from a |
| 7356324 |
Mobile radio receiver device |
April 8, 2008 |
| The invention is directed to a receiver arrangement, for example, in a mobile radio, which allows the use of slowly locking phase locked loops for a point-to-point connection between two transceivers, even in the case of a heterodyne receiver structure. The need to change channels be |
| 7349516 |
Method for trimming a two-point modulator, and a two-point modulator having a trimming apparatus |
March 25, 2008 |
| A PLL circuit (1) is regulated by means of a digital modulation signal (28) at a first frequency, and is then regulated at a second frequency, by deactivation of the digital modulation signal (28). A difference signal (32), which is characteristic of the voltage change in a control s |
| 7340633 |
Method for automatically detecting the clock frequency of a system clock pulse for the configura |
March 4, 2008 |
| The present invention provides a method for automatic identification of the clock frequency of a system clock (15) for the configuration of a peripheral device (12), having the following steps: generation of a secondary clock (16) at a predetermined clock frequency; application of th |
| 7336717 |
Receiver circuit, in particular for a mobile radio |
February 26, 2008 |
| A radio receiver with a low intermediate frequency has a first mixer stage that can be fed with a modulated input signal and at whose output a complex intermediate frequency signal can be derived. Connected downstream of the first mixer stage is a limiting amplifier at whose output t |
| 7317768 |
Demodulator and demodulation method for demodulating received signals |
January 8, 2008 |
| The invention relates to a demodulator and also a demodulation method and enables a reliable demodulation even when the intermediate frequency range overlaps the range of the data frequencies of the signal. For this purpose, a rapidly oscillating output signal is generated from the i |
| 7274763 |
Unit for determining the sampling phase |
September 25, 2007 |
| The invention relates to an apparatus and a method for ascertaining and correcting the optimum sampling time for an oversampled input bit stream. This involves feeding the data bit blanked with the current sampling phase into the comparative sequence and using the data bit to ascertain a |
| 7180385 |
Direct frequency modulation system having an IQ mixer in the phase locked loop |
February 20, 2007 |
| A transmission arrangement includes a step-up frequency mixer that converts a modulation signal to a transmission frequency. The step-up frequency mixer is arranged within a phase locked loop that further comprises a frequency divider that is likewise supplied with the modulation dat |
| 7154347 |
Compensating method for a PLL circuit that functions according to the two-point principle, and P |
December 26, 2006 |
| A PLL circuit is tuned to a first frequency by using a first digital modulation signal and subsequently tuned to a second frequency by using a second digital modulation signal. A differential signal, that is a function of the change in voltage of a VCO control signal generated by the |
| 7142063 |
Two-point modulator comprising a PLL circuit and a simplified digital pre-filtering system |
November 28, 2006 |
| A two-point modulator includes a PLL circuit and a simplified digital pre-filtering system. The two-point modulator includes a first circuit path for impressing an analog modulation signal into a first point in the PLL circuit, and a second circuit path for impressing a digital modul |
| 7129737 |
Method for avoiding transients during switching processes in integrated circuits, and an integra |
October 31, 2006 |
| In a method for avoiding transients during switching processes in integrated circuits, a module of the integrated circuit is switched from a first operating state to a second operating state, a load change occurring thereby. In this case, it is ensured that the occurring quotient of |
| 7127262 |
Method for determining field strength |
October 24, 2006 |
| The document specifies a method for determining field strength which can be used in mobile radio systems, such as Bluetooth. The principle proposed involves alternate transmission and reception in the mobile radio system, with each timeslot comprising at least one time interval for t |
| 7127221 |
Receiver circuit, particularly for mobile radio |
October 24, 2006 |
| In a receiver circuit for demodulating a high-frequency signal, a limiting amplifier stage with a downstream sigma-delta converter is connected in series with a mixer stage that transforms a high-frequency signal that is supplied at its input into an intermediate-frequency signal. The |
| 7010063 |
Receiver circuit and method of processing a received signal |
March 7, 2006 |
| A receiver circuit of a cordless communication system has an analog signal processing section with a channel selection filter and a digital signal processing section which is connected downstream of the latter and has a group delay equalizer. The group delay equalizer is used to equalize |
| 6933798 |
Trimming method and trimming device for a PLL circuit for two-point modulation |
August 23, 2005 |
| In the case of a trimming method for a PLL circuit operating based on the principle of a two-point modulation, the PLL circuit is locked without any modulation being impressed and then an analog and a digital modulation signal are impressed into the locked PLL circuit. A signal that is |
| 6785348 |
Demodulator and method for demodulating CPFSK-modulated signals using a linear approximation of |
August 31, 2004 |
| In a method for demodulating a CPFSK-modulated signal, the n-1-th substitute symbol a.sub.n-1 which occurs in the linear approximation of the CPFSK is estimated in order to determine an n-th input data symbol d.sub.n on which the CPFSK modulation is based. The n-1-th substitute symbo |
| 6774738 |
Trimming method for a transceiver using two-point modulation |
August 10, 2004 |
| In a method for amplitude trimming in transceivers having a PLL circuit operating on the two-point modulation principle, the amplitude of an analog modulation signal is selected on the basis of a modulation shift of a defined digital modulation signal. A predetermined data sequence of th |
| 6756927 |
Sigma-delta programming device for a PLL frequency synthesizer, configuration using the sigma-de |
June 29, 2004 |
| A sigma-delta programmer is supplied with a data word having a word length of N bits. The most significant L bits of the data word represent the places before the decimal point, and the remaining N-L less significant bits represent the places after the decimal point in the data word. A |
