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Inventor:
Gurumurthy; Charan
Address:
Higley, AZ
No. of patents:
11
Patents:












Patent Number Title Of Patent Date Issued
8115307 Embedding device in substrate cavity February 14, 2012
An embodiment of the present invention is a technique to reduce interconnect length between devices. A cavity is formed in a substrate having a substrate surface. The cavity has a depth. A first device having a device surface and a thickness is placed into the cavity. The thickness m
7998857 Integrated circuit and process for fabricating thereof August 16, 2011
A process for fabricating an Integrated Circuit (IC) and the IC formed thereby is disclosed. The process comprises providing a substrate. The process further comprises forming a plurality of longitudinal trenches in the substrate and depositing a layer of a first conductive material on a
7985622 Method of forming collapse chip connection bumps on a semiconductor substrate July 26, 2011
A method of forming collapse chip connection bumps on a semiconductor substrate is provided. The method includes providing a semiconductor substrate having a plurality of bump vias on a top surface of the semiconductor substrate and electroplating the plurality of bump vias to form a
7956713 Forming a helical inductor June 7, 2011
In one embodiment, the present invention includes an apparatus having a substrate with vias extending between first and second surfaces thereof, and at least one helical inductor adapted within a via, which may be formed of a conductive material. Other embodiments are described and c
7831115 Optical die structures and associated package substrates November 9, 2010
Optical die structures and associated package substrates are generally described. In one example, an electronic device includes a package substrate having a package substrate core, a dielectric layer coupled with the package substrate core, and one or more input/output (I/O) optical
7790598 System, apparatus, and method for advanced solder bumping September 7, 2010
According to some embodiments, a method, apparatus, and system are provided. In some embodiments, the method includes providing solder resist material on a surface of a substrate, applying mask material on top of the solder resist material, reflowing solder located in an opening form
7666714 Assembly of thin die coreless package February 23, 2010
In one embodiment, a method comprises coupling a coreless substrate panel to a pressure cover plate of a carrier, applying flux to the coreless substrate panel, placing at least one die on the coreless substrate panel, reflowing solder onto the coreless substrate panel, defluxing the
7592202 Embedding device in substrate cavity September 22, 2009
An embodiment of the present invention is a technique to reduce interconnect length between devices. A cavity is formed in a substrate having a substrate surface. The cavity has a depth. A first device having a device surface and a thickness is placed into the cavity. The thickness m
7583871 Substrates for optical die structures September 1, 2009
Package substrates for optical die structures are generally described. In one example, an apparatus includes a package substrate having one or more plated through hole (PTH) structures, an optical waveguide coupled with the package substrate, the optical waveguide having one or more
7517788 System, apparatus, and method for advanced solder bumping April 14, 2009
According to some embodiments, a method, apparatus, and system are provided. In some embodiments, the method includes providing solder resist material on a surface of a substrate, applying mask material on top of the solder resist material, reflowing solder located in an opening form
7013562 Method of using micro-contact imprinted features for formation of electrical interconnects for s March 21, 2006
An imprinting stamp to imprint an opening in a material layer in which the imprint stamp has a coating of a seed material. The seed material is transferred onto the surface within the opening to operate as a seed for filling the opening. In one embodiment, low surface energy material is










 
 
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