Resources Contact Us Home
Gradstein; Arnit
Binyamina, IL
No. of patents:

Patent Number Title Of Patent Date Issued
8103858 Efficient parallel floating point exception handling in a processor January 24, 2012
Methods and apparatus are disclosed for handling floating point exceptions in a processor that executes single-instruction multiple-data (SIMD) instructions. In one embodiment a numerical exception is identified for a SIMD floating point operation and SIMD micro-operations are initia

  Recently Added Patents
Algorithm for color corrected analog dimming in multi-color LED system
Method and apparatus for feeding a polyurethane mixture into hollow bodies
Servomotor control circuit
Method and apparatus for an active low power mode of a portable computing device
Multiple RF band operation in mobile devices
Content protection apparatus and content encryption and decryption apparatus using white-box encryption table
Apparatus and method for weighing an item of mail during transport through a sorting installation and having an anti-vibration device
  Randomly Featured Patents
Apparatus for concealing error in transform coding of a motion picture
Method and system of optimizing a control system using low voltage and high-speed switching
Cleaning device of band-like apparatus
Coffee lid
Resilient supply and exhaust valve
Fabrication of lasing microcavities consisting of highly luminescent colloidal nanocrystals
fixture for manual functional testing of wireless devices
Transmission control system
System for limiting intermodulation distortion of talkspurt signals
Device for retaining a boot on a glide board intended for snowboarding