| Patent Number |
Title Of Patent |
Date Issued |
| 7600079 |
Performing a memory write of a data unit without changing ownership of the data unit |
October 6, 2009 |
| A method comprises, while a first device has ownership of a data unit, a second device issuing a request to perform a memory write of said data unit. The method further comprises a memory controller performing the memory write without changing ownership to the second device. |
| 7310708 |
Cache system with groups of lines and with coherency for both single lines and groups of lines |
December 18, 2007 |
| In a computer system with caching, memory transactions can retrieve and store groups of lines. Coherency states are maintained for groups of lines, and for individual lines. A single coherency transaction, and a single address transaction, can then result in the transfer of multiple |
| 7096320 |
Computer performance improvement by adjusting a time used for preemptive eviction of cache entri |
August 22, 2006 |
| A cache memory system can determine that an entry is stale if the entry has not been accessed or modified for a predetermined time. If an entry is stale, the entry may be preemptively evicted. The predetermined time is made dynamically variable. A computer system can adjust the time to |
| 7085887 |
Processor and processor method of operation |
August 1, 2006 |
| In one embodiment, the present invention is directed to a processor that comprises an instruction pipeline for executing processor instructions wherein the processor instructions define a memory access size and a cache memory for storing cache lines in a plurality of memory banks that |
| 7051195 |
Method of optimization of CPU and chipset performance by support of optional reads by CPU and ch |
May 23, 2006 |
| In processing an instruction request, the invention determines whether the request is speculative or not based upon a bit field within the instruction. If the request is speculative, bus congestion and/or target memory is assessed for conditions and a decision is made, based on the c |
| 6950135 |
Method and apparatus for gathering three dimensional data with a digital imaging system |
September 27, 2005 |
| A digital image capture device including circuits capable of measuring the distance between the image capture device and an imaged object allows the capture of three-dimensional data of the surface of the object facing the image capture device. The distance data is obtained by the additi |
| 6938071 |
Fault tolerant storage system having an interconnection fabric that also carries network traffic |
August 30, 2005 |
| A networked system includes a fault tolerant storage system (FTSS) having an interconnection fabric that also carries network traffic. A plurality of servers are coupled to an FTSS via an FTSS interconnection fabric. As soon as a packet is received from a sending node, the packet is comm |
| 6892173 |
Analyzing effectiveness of a computer cache by estimating a hit rate based on applying a subset |
May 10, 2005 |
| A system and method for analyzing the effectiveness of a computer cache memory. A bus with memory transactions is monitored. A subset of addresses, along with associated transaction data, on the bus is captured and stored in a memory. The captured addresses are applied to a software |
| 6889244 |
Method and apparatus for passing messages using a fault tolerant storage system |
May 3, 2005 |
| A method and apparatus pass messages between server and client applications using a fault tolerant storage system (FTSS). The interconnection fabric that couples the FTSS to the computer systems that host the client and server applications may also be used to carry messages. A networked |
| 6813691 |
Computer performance improvement by adjusting a count used for preemptive eviction of cache entr |
November 2, 2004 |
| A cache system improves performance by limiting the number of dirty entries in a cache. The cache system may be further improve performance by limiting the number of dirty entries in a cache that might be subject to a cache-to-cache transfer. In a first example, a cache system counts the |
| 6810465 |
Limiting the number of dirty entries in a computer cache |
October 26, 2004 |
| A cache system improves performance by limiting the number of dirty entries in a cache. The cache system may further improve performance by limiting the number of dirty entries in the cache that might be subject to a cache-to-cache transfer. In a first example, a cache system counts the |
| 6792550 |
Method and apparatus for providing continued operation of a multiprocessor computer system after |
September 14, 2004 |
| A multiprocessor computer system continues operation after the failure of a cooling device coupled to a central processing unit (CPU). In accordance with the present invention, an impending failure of a cooling device is detected, and all user and operating system processes are moved fro |
| 6662277 |
Cache system with groups of lines and with coherency for both single lines and groups of lines |
December 9, 2003 |
| In a computer system with caching, memory transactions can retrieve and store groups of lines. Coherency states are maintained for groups of lines, and for individual lines. A single coherency transaction, and a single address transaction, can then result in the transfer of multiple |
| 6611926 |
Mechanisms to sample shared-dirty-line addresses |
August 26, 2003 |
| A device and method for collecting data on which lines are being shared in a multiprocessor system having cache memories is described. In the present invention, a sample arm register observes a local channel, such as a bus, for key events. Upon waiting a certain number of events, the sam |
| 6532151 |
Method and apparatus for clearing obstructions from computer system cooling fans |
March 11, 2003 |
| An obstruction is removed from a computer system cooling fan by manipulating fan rotation. When a fan obstruction is detected, the fan is stopped. If the obstruction is caused by an object that was drawn toward the fan intake, such as a sheet of paper, this operation may clear the ob |
| 6381615 |
Method and apparatus for translating virtual path file access operations to physical file path a |
April 30, 2002 |
| A method and apparatus virtualizes file access operations and other I/O operations in operating systems by performing string substitutions upon a file paths or other resource identifiers to convert the virtual destination of an I/O operation to a physical destination. A virtual file |
| 6223256 |
Computer cache memory with classes and dynamic selection of replacement algorithms |
April 24, 2001 |
| A cache memory system for a computer. Target entries for the cache memory include a class attribute. The cache may use a different replacement algorithm for each possible class attribute value. The cache may be partitioned into sections based on class attributes. Class attributes may |
| 6195650 |
Method and apparatus for virtualizing file access operations and other I/O operations |
February 27, 2001 |
| A method and apparatus virtualizes file access operations and other I/O operations in operating systems by performing string substitutions upon a file paths or other resource identifiers to convert the virtual destination of an I/O operation to a physical destination. In accordance w |
