| Patent Number |
Title Of Patent |
Date Issued |
| 6326824 |
Timing synchronizing system, devices used in the system, and timing synchronizing method |
December 4, 2001 |
| An initial value generation circuit generates an initial value taking into consideration the a time delay when a signal is transmitted through the signal wires between a pilot device and other devices, and a processing delay caused in respective devices. When a device receives a system |
| 5905875 |
Multiprocessor system connected by a duplicated system bus having a bus status notification line |
May 18, 1999 |
| A multiprocessor system having the capability of increasing the speed of a bus clock while retaining high reliability and fault tolerant performance as well as utilizing the current operating system resources. The multiprocessor system is made up of a plurality of processor modules c |
| 5796996 |
Processor apparatus and its control method for controlling a processor having a CPU for executin |
August 18, 1998 |
| In the case where a CPU executes a write instruction of a control program for a memory mapped register of an external memory, a write address and write data are written into an output buffer, thereby completing the write instruction. Prior to executing a read instruction subsequent to th |
| 5761728 |
Asynchronous access system controlling processing modules making requests to a shared system mem |
June 2, 1998 |
| An asynchronous access system for a computer system includes processing modules performing processes, at least one shared system memory module, and a system bus connecting the processing modules and the shared system memory module. Each of the processing modules includes a processor, a |
| 5737573 |
Asynchronous access system having an internal buffer control circuit which invalidates an intern |
April 7, 1998 |
| An asynchronous access system includes a system bus, at least one processing module provided with a main memory, a central processing unit and a first connection unit which connects to the system bus, and at least one shared memory module provided with a shared memory unit and a second |
| 5708795 |
Asynchronous access system for multiprocessor system and processor module used in the asynchrono |
January 13, 1998 |
| In an asynchronous access system for a multiprocessor system having a plurality of processor modules connected to a system bus and at least one shared memory module connected to the system bus, each of the processor modules includes a processor and an internal buffer. The processor write |
| 5546363 |
Clock apparatus for forming time information for use in computer system |
August 13, 1996 |
| A commercially available clock IC which is easily influenced by a temperature change or the like is used as it is, thereby easily allowing the clock IC to function as a high precision clock IC. A high precision oscillator is provided separately from a clock circuit as a clock IC. On |
