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Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Fong; Mark
Address:
San Jose, CA
No. of patents:
7
Patents:












Patent Number Title Of Patent Date Issued
7995622 Digital clock smoothing August 9, 2011
A method for digital clock smoothing is provided. The method comprises: (A) inputting an asynchronous data stream having an asynchronous symbol rate into a FIFO two-port memory block; (B) obtaining FIFO depth B by subtracting modulo B for each stored symbol a symbol output address from
7970080 Modes of operations in QAM modems using hysteresis sub-states June 28, 2011
A method of automated acquisition of a QAM signal is provided. The method employs a State machine progressing from an initial State to a final State. The State machine comprises: a symbol timing recovery loop; a carrier loop; a coarse frequency loop; and an equalizer. The method comp
7835259 Control algorithm using hysteresis sub-states in QAM modems November 16, 2010
An apparatus for automated acquisition of a QAM signal. The apparatus employs a State machine progressing from an initial State to a final State. The State Machine comprises: (A) an AGC State further comprising a Minimum Sub-State further comprising: Coarse Estimate Sub-State; and an
7613211 Digital clock smoothing apparatus and method November 3, 2009
A method for digital clock smoothing comprising: (A) inputting an asynchronous data stream having an asynchronous symbol rate into a two-port memory block; (B) accumulating a plurality of symbols of the asynchronous data stream in the two-port memory block for a predetermined time pe
7477708 Modes of operations in QAM modems January 13, 2009
The method of selecting an optimum mode of operation of the QAM modem comprising (A) using a host interface to select a pair of states, the first state being an initial state; the second state being an intermediate state; and (B) causing a state machine to progress from the initial s
7170956 Frequency agile tuner and variable rate decimator for digital demodulator January 30, 2007
An apparatus for demodulating a digital input signal having a pre-assigned symbol rate by using a single sample clock signal is disclosed. The pre-assigned symbol rate is selected from the group consisting of a plurality of symbol rates. The apparatus comprises: a Cascaded Integrated
7161989 CIC qam modulator January 9, 2007
An apparatus for modulating a digital input signal having a pre-assigned symbol rate and having a baseband carrier frequency by using a single sample clock signal. The pre-assigned symbol rate is selected from the group consisting of a plurality of symbol rates. The apparatus in a ba










 
 
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