| Patent Number |
Title Of Patent |
Date Issued |
| 5530894 |
Adapter for interfacing a computer to a multichannel digital network, with port for a telephone |
June 25, 1996 |
| Disclosed is an arrangement for "seamlessly" integrating telephone services relative to primitive analog telephone equipment into general purpose computer systems. The integration is effected through present "secondary" adaptation of data link control adapter devices which are adapted |
| 5241541 |
Burst time division multiplex interface for integrated data link controller |
August 31, 1993 |
| Subject burst time division multiplex interface connects circuits which perform "layer 1 (L1)" line control functions relative to a data communication network with devices which perform "Layer 2 (L2)" link control functions relative to the same network (L1 and L2 defined by OSI Speci |
| 5218680 |
Data link controller with autonomous in tandem pipeline circuit elements relative to network cha |
June 8, 1993 |
| A "single-chip" integrated circuit device, useful in ISDN digital voice and data telephone applications, links plural channels of a data communication network with memory and CPU components of a data processing system. The device couples to the system via a bus that may be shared by othe |
| 5206933 |
Data link controller with channels selectively allocatable to hyper channels and hyper channel d |
April 27, 1993 |
| An integrated data link control device (IDLC) interfaces between a host computer system and external channels in a communication network. The device contains multiple internal channels allocatable individually to interface to the external channels, each internal channel having internal |
| 5182800 |
Direct memory access controller with adaptive pipelining and bus control features |
January 26, 1993 |
| An improved multi-channel direct memory access (DMA) controller for data processing systems provides adaptive pipelining and time overlapping of operations performed relative to communication channels. Registers and resources used to pipeline communication data and control signals relati |
| 5121390 |
Integrated data link controller with synchronous link interface and asynchronous host processor |
June 9, 1992 |
| A single chip integrated data link control (IDLC) device provides full duplex data throughput and versatile protocol adaptation between variably configured time channels on a high speed TDM digital link (e.g. T-1 or T-3 line) and a host data processing system. The device can handle multi |
