| Patent Number |
Title Of Patent |
Date Issued |
| 7443941 |
Method and system for phase offset cancellation in systems using multi-phase clocks |
October 28, 2008 |
| A system for use with a multi-phase clock generator is disclosed. It should also be understood that the multiphase clock generator can be a phase lock loop (PLL), delay lock loop (DLL), or any other circuit capable of providing a multiphase clock. The system comprises at least two ph |
| 7414489 |
Phase controlled oscillator circuit with input signal coupler |
August 19, 2008 |
| An oscillating signal in an oscillator is caused to phase shift toward the phase of an input signal coupled to the oscillating signal. The resonant frequency of the oscillator is about equal to an integer multiple of the frequency of the input signal. The input signal may be generated in |
| 7333578 |
Linear data recovery phase detector |
February 19, 2008 |
| An input data sequence is sampled according to a sampling clock such that a first set of samples corresponds to data values and a second set of samples corresponds to edges between the data values. The phase error between data transitions in the input sequence and the sampled edges is |
| 7319345 |
Wide-range multi-phase clock generator |
January 15, 2008 |
| A wide-range multi-phase clock generator having a first clock generating circuit, a frequency divider circuit, and a plurality of multiplexers. The first clock generating circuit generates a plurality of first clock signals, each having a first frequency and a respective one of a plu |
| 7274242 |
Pass transistors with minimized capacitive loading |
September 25, 2007 |
| A tracking switch includes an MOS switching transistor with a control terminal coupled to a CMOS inverter. The relative geometries of the transistors that make up the inverter are significantly imbalanced, resulting is substantially different drive strengths (i.e., substantially diff |
| 7257183 |
Digital clock recovery circuit |
August 14, 2007 |
| A clock recovery circuit includes a sampler for sampling a data signal. Logic determines whether a data edge lags or precedes a clock edge which drives the sampler, and provides early and late indications. A filter filters the early and late indications, and a phase controller adjusts |
| 7167517 |
Analog N-tap FIR receiver equalizer |
January 23, 2007 |
| An equalizer includes plural samplers for sampling an incoming input data stream according to plural phases of a sampling clock, each sampler producing a data sample. Operating in the analog domain, a multi-tap finite impulse response (FIR) filter weights the data samples and combine |
| 7078979 |
Phase controlled oscillator circuit with input signal coupler |
July 18, 2006 |
| An oscillating signal in an oscillator is caused to phase shift toward the phase of an input signal coupled to the oscillating signal. The resonant frequency of the oscillator is about equal to an integer multiple of the frequency of the input signal. The input signal may be generated in |
| 6937073 |
Frequency multiplier with phase comparator |
August 30, 2005 |
| A phase comparison of timing signals is made by combinational circuitry which receives the timing signals and a window signal, the window signal identifying edges of the timing signals to be compared. The comparison may result in a charge pumped output which can be fed back to control th |
| 6861916 |
Phase controlled oscillator circuit with input signal coupler |
March 1, 2005 |
| An oscillating signal in an oscillator is caused to phase shift toward the phase of an input signal coupled to the oscillating signal. The resonant frequency of the oscillator is about equal to an integer multiple of the frequency of the input signal. The input signal may be generated in |
| 6794946 |
Frequency acquisition for data recovery loops |
September 21, 2004 |
| A frequency monitor includes an edge detector which produces a pulse for each rising or falling edge of an error signal. The error signal itself has a frequency that is responsive to a difference between frequencies of two input signals. A switched capacitor circuit has an effective aver |
| 6617936 |
Phase controlled oscillator |
September 9, 2003 |
| An oscillating signal in an oscillator is caused to phase shift toward the phase of an input signal coupled to the oscillating signal. The resonant frequency of the oscillator is about equal to an integer multiple of the frequency of the input signal. The input signal may be generated in |
| 6476656 |
Low-power low-jitter variable delay timing circuit |
November 5, 2002 |
| The timing circuit includes at least one delay element and its supply voltage is obtained from an active current source. The current source is a current mirror which is driven by a differential amplifier. The differential amplifier compares a voltage on the delay element supply line |
| 6316987 |
Low-power low-jitter variable delay timing circuit |
November 13, 2001 |
| The timing circuit includes at least one delay element and its supply voltage is obtained from an active current source. The current source is a current mirror which is driven by a differential amplifier. The differential amplifier compares a voltage on the delay clement supply line |
| 6275072 |
Combined phase comparator and charge pump circuit |
August 14, 2001 |
| A phase comparison of timing signals is made by combinational circuitry which receives the timing signals and a window signal, the window signal identifying edges of the timing signals to be compared. The comparison may result in a charge pumped output which can be fed back to control th |
