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Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Enquist; Paul M.
Address:
Cary, NC
No. of patents:
29
Patents:












Patent Number Title Of Patent Date Issued
8153505 Method for low temperature bonding and bonded structure April 10, 2012
A method for bonding at low or room temperature includes steps of surface cleaning and activation by cleaning or etching. The method may also include removing by-products of interface polymerization to prevent a reverse polymerization reaction to allow room temperature chemical bondi
8053329 Method for low temperature bonding and bonded structure November 8, 2011
A method for bonding at low or room temperature includes steps of surface cleaning and activation by cleaning or etching. The method may also include removing by-products of interface polymerization to prevent a reverse polymerization reaction to allow room temperature chemical bondi
7956447 Wafer scale die handling June 7, 2011
A waffle pack device including a member having recesses in a surface of the member to accommodate die from at least one semiconductor wafer. The member is compatible with semiconductor wafer handling equipment and/or semiconductor wafer processing. Preferably, the member accommodates at
7871898 Method for low temperature bonding and bonded structure January 18, 2011
A method for bonding at low or room temperature includes steps of surface cleaning and activation by cleaning or etching. The method may also include removing by-products of interface polymerization to prevent a reverse polymerization reaction to allow room temperature chemical bondi
7842540 Room temperature metal direct bonding November 30, 2010
A bonded device structure including a first substrate having a first set of metallic bonding pads, preferably connected to a device or circuit, and having a first non-metallic region adjacent to the metallic bonding pads on the first substrate, a second substrate having a second set of
7807549 Method for low temperature bonding and bonded structure October 5, 2010
A method for bonding at low or room temperature includes steps of surface cleaning and activation by cleaning or etching. One etching process The method may also include removing by-products of interface polymerization to prevent a reverse polymerization reaction to allow room temperatur
7781307 Method for low temperature bonding and bonded structure August 24, 2010
A method for bonding at low or room temperature includes steps of surface cleaning and activation by cleaning or etching. The method may also include removing by-products of interface polymerization to prevent a reverse polymerization reaction to allow room temperature chemical bondi
7714446 Single mask via method and device May 11, 2010
A method of connecting elements such as semiconductor devices and a device having connected elements such as semiconductor devices. A first element having a first contact structure is bonded to a second element having a second contact structure. A single mask is used to form a via in the
7622324 Wafer bonding hermetic encapsulation November 24, 2009
A method for providing encapsulation of an electronic device which obtains an encapsulating member configured to enclose the electronic device, prepares a surface of the encapsulating member for non-adhesive direct bonding, prepares a surface of a device carrier including the electronic
7602070 Room temperature metal direct bonding October 13, 2009
A bonded device structure including a first substrate having a first set of metallic bonding pads, preferably connected to a device or circuit, and having a first non-metallic region adjacent to the metallic bonding pads on the first substrate, a second substrate having a second set of
7553744 Method for low temperature bonding and bonded structure June 30, 2009
A method for bonding at low or room temperature includes steps of surface cleaning and activation by cleaning or etching. One etching process The method may also include removing by-products of interface polymerization to prevent a reverse polymerization reaction to allow room temperatur
7485968 3D IC method and device February 3, 2009
A method of three-dimensionally integrating elements such as singulated die or wafers and an integrated structure having connected elements such as singulated dies or wafers. Either or both of the die and wafer may have semiconductor devices formed therein. A first element having a first
7387944 Method for low temperature bonding and bonded structure June 17, 2008
A method for bonding at low or room temperature includes steps of surface cleaning and activation by cleaning or etching. One etching process The method may also include removing by-products of interface polymerization to prevent a reverse polymerization reaction to allow room temperatur
7341938 Single mask via method and device March 11, 2008
A method of connecting elements such as semiconductor devices and a device having connected elements such as semiconductor devices. A first element having a first contact structure is bonded to a second element having a second contact structure. A single mask is used to form a via in the
7335572 Method for low temperature bonding and bonded structure February 26, 2008
A method for bonding at low or room temperature includes steps of surface cleaning and activation by cleaning or etching. The method may also include removing by-products of interface polymerization to prevent a reverse polymerization reaction to allow room temperature chemical bondi
7126212 Three dimensional device integration method and integrated device October 24, 2006
A device integration method and integrated device. The method may include the steps of directly bonding a semiconductor device having a substrate to an element; and removing a portion of the substrate to expose a remaining portion of the semiconductor device after bonding. The element
7041178 Method for low temperature bonding and bonded structure May 9, 2006
A method for bonding at low or room temperature includes steps of surface cleaning and activation by cleaning or etching. The method may also include removing by-products of interface polymerization to prevent a reverse polymerization reaction to allow room temperature chemical bondi
7037755 Three dimensional device integration method and integrated device May 2, 2006
A device integration method and integrated device. The method may include the steps of directly bonding a semiconductor device having a substrate to an element; and removing a portion of the substrate to expose a remaining portion of the semiconductor device after bonding. The element
6984571 Three dimensional device integration method and integrated device January 10, 2006
A device integration method and integrated device. The method includes the steps of polishing surfaces of first and second workpieces each to a surface roughness of about 5 10 .ANG.. The polished surfaces of the first and second workpieces are bonded together. A surface of a third workpi
6962835 Method for room temperature metal direct bonding November 8, 2005
A bonded device structure including a first substrate having a first set of metallic bonding pads, preferably connected to a device or circuit, and having a first non-metallic region adjacent to the metallic bonding pads on the first substrate, a second substrate having a second set of m
6905557 Three dimensional integrated device June 14, 2005
A device integration method and integrated device. The method includes the steps of polishing surfaces of first and second workpieces each to a surface roughness of about 5-10 .ANG.. The polished surfaces of the first and second workpieces are bonded together. A surface of a third workpi
6902987 Method for low temperature bonding and bonded structure June 7, 2005
A method for bonding at low or room temperature includes steps of surface cleaning and activation by cleaning or etching. One etching process the method may also include removing by-products of interface polymerization to prevent a reverse polymerization reaction to allow room temperatur
6867073 Single mask via method and device March 15, 2005
A method of connecting elements such as semiconductor devices and a device having connected elements such as semiconductor devices. A first element having a first contact structure is bonded to a second element having a second contact structure. A single mask is used to form a via in the
6864585 Three dimensional device integration method and integrated device March 8, 2005
A device integration method and integrated device. The method may include the steps of directly bonding a semiconductor device having a substrate to an element; and removing a portion of the substrate to expose a remaining portion of the semiconductor device after bonding. The element ma
6822326 Wafer bonding hermetic encapsulation November 23, 2004
A method for providing encapsulation of an electronic device which obtains an encapsulating member configured to enclose the electronic device, prepares a surface of the encapsulating member for non-adhesive direct bonding, prepares a surface of a device carrier including the electronic
6627531 Three dimensional device integration method and integrated device September 30, 2003
A device integration method and integrated device. The method may include the steps of directly bonding a semiconductor device having a substrate to an element; and removing a portion of the substrate to expose a remaining portion of the semiconductor device after bonding. The element ma
6500694 Three dimensional device integration method and integrated device December 31, 2002
A device integration method and integrated device. The method may include the steps of directly bonding a semiconductor device having a substrate to an element; and removing a portion of the substrate to expose a remaining portion of the semiconductor device after bonding. The element ma
5780880 High injection bipolar transistor July 14, 1998
An optoelectronic semiconductor device using stimulated emission and absorption to achieve the functions of detection, modulation, generation and/or amplification of light. In one embodiment, the device includes a waveguide heterojunction bipolar transistor (HBT) biased in the active
5684308 CMOS-compatible InP/InGaAs digital photoreceiver November 4, 1997
A digital photoreceiver is formed monolithically on an InP semiconductor substrate and comprises a p-i-n photodetector formed from a plurality of InP/InGaAs layers deposited by an epitaxial growth process and an adjacent heterojunction bipolar transistor (HBT) amplifier formed from the s










 
 
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