Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
El-Ayat; Khaled Ahmad
Address:
Cupertino, CA
No. of patents:
2
Patents:












Patent Number Title Of Patent Date Issued
6392437 Programmable multi-standard I/O architecture for FPGAs May 21, 2002
The invention discloses an architecture for the input/output buffer section of an FPGA. It provides a convenient and efficient addressing scheme for addressing fuse matrices that are used to configure programmable input/output buffers in the FPGA. The programmable I/O buffers may be
6242943 Programmable multi-standard I/O architecture for FPGAS June 5, 2001
The invention discloses an architecture for the input/output buffer section of an FPGA. It provides a convenient and efficient addressing scheme for addressing fuse matrices that are used to configure programmable input/output buffers in the FPGA. The programmable I/O buffers may be










 
 
  Recently Added Patents
Base station device and wireless communication method
Generating wiki pages from content and transformation objects
Antagonists of the glucagon receptor
Pixel circuit
Image forming apparatus with static elimination
System and method for logical separation of a server by using client virtualization
Control unit including a computing device and a peripheral module which are interconnected via a serial multiwire bus
  Randomly Featured Patents
Water conservation system
metK from Streptococcus pneumoniae
Plural gun cathode ray tube having parallel plates adjacent grid apertures
Guiding and stacking system for sheet metal parts
Rogue data packet removal method and apparatus
User equipment for code group synchronization
Water sterilization system
Bracelet or similar article
Process for reducing volatile organic compound content of refinery liquid waste streams using aqueous solutions containing microbes
Headlight