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Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Eglit; Alexander Julian
Address:
Half Moon Bay, CA
No. of patents:
25
Patents:












Patent Number Title Of Patent Date Issued
7801257 Adaptive reception techniques for over-sampled receivers September 21, 2010
An over-sampled sequence detector operates on sampled data and tracks the detection reliability of the sampled data. The detector separately analyzes sample sequences for different sampling phases and then picks a sample sequence that allows for the most reliable detection. For the d
7412017 Method and apparatus for reception of data over a transmission link August 12, 2008
An over-sampled sequence detector operates on sampled data and tracks the detection reliability of the sampled data. The detector separately analyzes sample sequences for different sampling phases and then picks a sample sequence that allows for the most reliable detection. For the d
7292665 Method and apparatus for reception of data over digital transmission link November 6, 2007
An over-sampled sequence detector operates on sampled data and tracks the detection reliability of the sampled data. The detector separately analyzes sample sequences for different sampling phases and then picks a sample sequence that allows for the most reliable detection. For the d
6765563 Monolithic integrated circuit implemented in a digital display unit for generating digital data July 20, 2004
A monolithic integrated circuit for use in a digital display unit. The circuit may include an analog-to-digital converter (ADC), a scaler and a clock recovery circuit. The present invention enables the integration of at least these components into a single monolithic integrated circuit
6483447 Digital display unit which adjusts the sampling phase dynamically for accurate recovery of pixel November 19, 2002
A digital display unit adjusting the phase of a sampling clock based on the examination of a display data signal contained in a received analog display signal. The phase may be adjusted by determining a boundary between display data portions representing successive pixel data elements.
6459426 Monolithic integrated circuit implemented in a digital display unit for generating digital data October 1, 2002
A monolithic integrated circuit for use in a digital display unit. The circuit may include an analog-to-digital converter (ADC), a scaler and a clock recovery circuit. The present invention enables the integration of at least these components into a single monolithic integrated circuit
6430240 Receiver to recover data encoded in a serial communication channel August 6, 2002
A receiver to recover data encoded at high speed in a signal over a serial communication channel. A static phase determination circuit indicates whether the signal is early, late or neutral relative to a sampling clock. The sampling clock is used to oversample the signal to generate mult
6310599 Method and apparatus for providing LCD panel protection in an LCD display controller October 30, 2001
A flat panel display controller is provided with a circuit for monitoring clocking signal(s) to the flat panel display. A clocking signal output to the flat panel display may be fed back to the display controller using a conventional I/O pad. In the preferred embodiment, the fed back clo
6307498 Digital display unit of a computer system having an improved method and apparatus for sampling a October 23, 2001
A digital display unit for minimizing the display artifacts which may be caused by aliasing of high frequency distortions present in wide bandwidth analog display signals. The minimization is achieved by modulating a sampling clock signal by different phase delay amounts for successive
6272193 Receiver to recover data encoded in a serial communication channel August 7, 2001
A receiver to recover data encoded at high speed in a signal over a serial communication channel. A static phase determination circuit indicates whether the signal is early, late or neutral relative to a sampling clock. The sampling clock is used to oversample the signal to generate mult
6268848 Method and apparatus implemented in an automatic sampling phase control system for digital monit July 31, 2001
An automatic sampling control system for digital monitors. A clock generation circuit generates a sampling clock. A phase controller modifies the phase of the sampling clock by a phase amount. An ADC samples a frame of an analog display signal to generate digital samples. A value which i
6232952 Method and apparatus for comparing frequently the phase of a target clock signal with the phase May 15, 2001
A phase comparator circuit which can compare the phase of a target clock signal with the phase of a reference clock signal with a short comparison cycle. An auxiliary waveform representative of the incremental phase of each of the reference and target clock signals may be generated, and
6157376 Method and apparatus for generating a target clock signal having a frequency of X/Y times the fr December 5, 2000
A clock generator circuit which provides for short comparison cycles even if X and Y do not have a large common denominator when a target clock signal having a frequency of (X/Y) times the frequency of a reference clock signal is to be generated. The comparison cycle is shortened by
6147668 Digital display unit of a computer system having an improved method and apparatus for sampling a November 14, 2000
A digital display unit for minimizing the display artifacts which may be caused by aliasing of high frequency distortions present in wide bandwidth analog display signals. The minimization is achieved by modulating a sampling clock signal by different phase delay amounts for successive
6054980 Display unit displaying images at a refresh rate less than the rate at which the images are enco April 25, 2000
A display unit receiving a display signal having source image frames encoded at an encoding rate (FR.sub.S). A display screen may be refreshed at a refresh rate which is less than the encoding rate. An actual refresh rate (FR.sub.D) is determined such that FR.sub.S /FR.sub.D =(N+1)/N. To
6046738 Method and apparatus for scanning a digital display screen of a computer screen at a horizontal April 4, 2000
A digital display unit receiving a display signal with image encoded at high origin frequencies (e.g., dot clock). A display signal interface samples the display signal during source display time to generate pixel data elements representative of the images encoded in the display signal.
6028571 Digital display unit in a computer system with an improved method and apparatus for determining February 22, 2000
A digital display unit which accurately determines a graphics source mode using which an analog display signal has been generated. Accurate determination of the source mode enables images encoded in the received display signal to be reproduced properly on a digital display screen. Some
6023262 Method and apparatus in a computer system to generate a downscaled video image for display on a February 8, 2000
A graphics controller circuit in a computer system for generating display signals to a television. The graphics controller circuit may downscale a display image to generate a downscaled image. While downscaling, the graphics controller circuit may generate each horizontal line of a d
6011538 Method and apparatus for displaying images when an analog-to-digital converter in a digital disp January 4, 2000
A digital display unit including an analog to digital converter (ADC). When the optimal sampling frequency for sampling an analog display signal is greater than the maximum sampling frequency of the ADC, the analog display signal is sampled using 2:1' interleaved sampling. A smaller imag
6005544 Digital display unit in a computer system for enabling a user to conveniently select a desired m December 21, 1999
A digital display unit for enabling a user to conveniently select a desired monitor mode to process a display signal. A monitor mode is generally selected by measuring some display signal parameters. If multiple source modes share the same display signal values, all the corresponding mon
5987624 Method and apparatus for automatically determining signal parameters of an analog display signal November 16, 1999
A computer system in which the signal parameters of an analog display signal received by a display unit can be determined automatically. A test data having a predetermined format is sent to a display unit. The test data is encoded to enable display unit to measure display signal para
5850207 Method and apparatus for minimizing effects of slope overload condition when using differential December 15, 1998
A display controller to upscale a source video image for display on a display unit of a computer system. An encoder circuit stores in a local memory pixel data of previous scan lines required for interpolation in a compressed format using differential pulse code modulation (DPCM) scheme.
5847701 Method and apparatus implemented in a computer system for determining the frequency used by a gr December 8, 1998
A display unit which can determine the frequency (original frequency) used by a graphics source for generating an analog signal. A sequence of test patterns are generated according to a predetermined convention. The sequence of test patterns are encoded in an analog display signal in a
5818405 Method and apparatus for reducing flicker in shaded displays October 6, 1998
An apparatus for controlling a flat panel display with reduced flicker, particularly during grey scale shading. Three shading pattern lookup tables are provided, one for each sub-pixel color (Red, Blue, Green). Each shading pattern lookup table outputs a plurality of shading pattern duty
5703618 Method and apparatus for upscaling video images when pixel data used for upscaling a source vide December 30, 1997
A graphics controller circuit for upscaling source video image to generate an upscaled video image. The graphics controller circuit generates additional pixel data for the upscaled video image by interpolating source video pixel data of a one scan line and an another scan line. However,










 
 
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