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Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Egeland; Terje
Address:
Varmdo, SE
No. of patents:
3
Patents:




Patent Number Title Of Patent Date Issued
6865736 Static cache March 8, 2005
The present invention discloses a processor system comprising a processor (31) and at least a first memory (32) and a second memory (34, 36, 37). The first memory (32) is normally faster than the second one, and means for memory allocation (38, 41, 48) perform the periodically static
6714961 Multiple job signals per processing unit in a multiprocessing system March 30, 2004
The invention is directed toward a multiprocessing system having multiple processing units. For at least one of the processing units in the multiprocessing system, a first job signal is assigned to the processing unit for speculative execution of a corresponding first job, and a further
6662203 Batch-wise handling of signals in a processing system December 9, 2003
The present invention relates to multiprocessing systems in which signals or processes are scheduled in order of their priority level. The invention is based on batch-wise acceptance and scheduling of job signals, and utilizes at least one delay queue for temporarily storing job signals


 
 
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