| Patent Number |
Title Of Patent |
Date Issued |
| 7624138 |
Method and apparatus for efficient integer transform |
November 24, 2009 |
| A method and apparatus for including in a processor instructions for performing integer transforms including multiply-add operations and horizontal-add operations on packed data. In one embodiment, a processor is coupled to a memory that stores a first packed byte data and a second p |
| 7430578 |
Method and apparatus for performing multiply-add operations on packed byte data |
September 30, 2008 |
| A method and apparatus for including in a processor instructions for performing multiply-add operations on packed byte data. In one embodiment, a processor is coupled to a memory. The memory has stored therein a first packed byte data and a second packed byte data. The processor perf |
| 7395302 |
Method and apparatus for performing horizontal addition and subtraction |
July 1, 2008 |
| A method and apparatus for including in a processor instructions for performing horizontal intra-add operations on packed data. One embodiment of the processor is coupled to a memory. The memory has stored therein at least a first packed data. The processor performs operations on data |
| 7395298 |
Method and apparatus for performing multiply-add operations on packed data |
July 1, 2008 |
| A method and apparatus for including in a processor instructions for performing multiply-add operations on packed data. In one embodiment, a processor is coupled to a memory. The memory has stored therein a first packed data and a second packed data. The processor performs operations |
| 7392275 |
Method and apparatus for performing efficient transformations with horizontal addition and subtr |
June 24, 2008 |
| A method and apparatus for including in a processor instructions for performing horizontal intra-add operations on packed data. One embodiment of the processor is coupled to a memory. The memory has stored therein at least a first packed data. The processor performs operations on data |
| 7343389 |
Apparatus and method for SIMD modular multiplication |
March 11, 2008 |
| An apparatus and method for single instruction multiple data (SIMD) modular multiplication are described. In one embodiment, the method includes selection of modular multiplication method available from an operating environment. Once the multiplication method is selected, a data acce |
| 7272622 |
Method and apparatus for parallel shift right merge of data |
September 18, 2007 |
| A method for a parallel shift right merge of data. The method of one embodiment comprises receiving a shift count of M. A first operand having a first set of L data elements is shifted left by `L-M` data elements. A second operand having a second set of L data elements is shifted right b |
| 7162607 |
Apparatus and method for a data storage device with a plurality of randomly located data |
January 9, 2007 |
| An apparatus and method for loading a data storage device with a plurality of randomly located data are described. The method includes loading, in response to execution of a multiple data load instruction, data within a destination data storage device wherein one or more data elements fr |
| 7143264 |
Apparatus and method for performing data access in accordance with memory access patterns |
November 28, 2006 |
| An apparatus and method for performing data access in accordance with memory access patterns are described. In one embodiment, the method includes the determination, in response to a memory access instruction, of a memory access pattern of data requested by the memory access instruct |
| 7085795 |
Apparatus and method for efficient filtering and convolution of content data |
August 1, 2006 |
| An apparatus and method for efficient filtering and convolution of content data are described. The method includes organizing, in response to executing a data shuffle instruction, a selected portion of data within a destination data storage device. The portion of data is organized ac |
| 6957317 |
Apparatus and method for facilitating memory data access with generic read/write patterns |
October 18, 2005 |
| An apparatus and method facilitating memory data access with generic read/write patterns are described. In one embodiment, the method includes the detection, in response to a load instruction, of a cache hit/cache miss of data requested by the load instruction within a re-tiling (RT) |
| 6781589 |
Apparatus and method for extracting and loading data to/from a buffer |
August 24, 2004 |
| An apparatus and method for extracting and loading data to/from a buffer are described. The method includes the selection of data from a data buffer in response to execution of a data access instruction. The data buffer includes a plurality of data storage devices, one or more of which |
