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Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
D'Anna; Pablo E.
Address:
Los Altos, CA
No. of patents:
5
Patents:












Patent Number Title Of Patent Date Issued
5841166 Lateral DMOS transistor for RF/microwave applications November 24, 1998
An IGFET device (lateral DMOS transistor) with reduced cell dimensions which is especially suitable for RF and microwave applications, includes a semiconductor substrate having an epitaxial layer with a device formed in a surface of the epitaxial layer. A sinker contact is provided from
5821144 Lateral DMOS transistor for RF/microwave applications October 13, 1998
An IGFET device (lateral DMOS transistor) with reduced cell dimensions which is especially suitable for RF and microwave applications, includes a semiconductor substrate having an epitaxial layer with a device formed in a surface of the epitaxial layer. A sinker contact is provided from
5027082 Solid state RF power amplifier having improved efficiency and reduced distortion June 25, 1991
An RF power device including a DMOS field effect transistor has increased efficiency and reduced distortion. A capacitor is connected between the gate and source input of the transistor which swamps non-linear variations of the parasitic capacitance (C.sub.GD) between the gate and drain,
5001083 Method of priming semiconductor substrate for subsequent photoresist masking and etching March 19, 1991
Disclosed is a method of improving semiconductor device yield by enhancing photoresist adherence to semiconductor substrates during device fabrication. The surface of a layer, such as silicon oxide of silicon nitride, on a semiconductor substrate is coated with a thin layer of oxygen
4971929 Method of making RF transistor employing dual metallization with self-aligned first metal November 20, 1990
An improved dual metallization process in which self-aligned tungsten contacts are formed to closely-spaced emitter or source sites in RF power silicon devices. Low-resistivity ohmic contacts are made by selectively depositing tungsten on the exposed silicon surfaces as a first metal lay










 
 
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