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Inventor:
Craddock; David F.
Address:
New Paltz, NY
No. of patents:
20
Patents:




Patent Number Title Of Patent Date Issued
7574537 Method, apparatus, and computer program product for migrating data pages by disabling selected D August 11, 2009
A method, apparatus, and computer program product are disclosed in a data processing system for migrating data pages subject to DMA access by temporarily disabling selected DMA operations within a physical I/O adapter. A determination is made as to whether to disable data access DMA
7555002 Infiniband general services queue pair virtualization for multiple logical ports on a single phy June 30, 2009
An aliased queue pair is provided within a logically partitioned data processing system for each logical partition for the single general services management queue pair that exists within a physical host channel adapter. Packets intended for the logical ports are received at the phys
7493409 Apparatus, system and method for implementing a generalized queue pair in a system area network February 17, 2009
The present invention provides an apparatus, system and method for providing a generalized queue pair for use with host channel adapters of a system area network. With the apparatus, system and method, the hypervisor of a host channel adapter maintains a P_Key table for each logical
7428598 Infiniband multicast operation in an LPAR environment September 23, 2008
A method, computer program product, and data processing system for providing system-area network (SAN) multicasting functionality in a logically partitioned (LPAR) data processing system in which a channel adapter is shared among a plurality of logical partitions is disclosed. A pref
7356625 Moving, resizing, and memory management for producer-consumer queues by consuming and storing an April 8, 2008
Systems, methods, and software products for moving and/or resizing a producer-consumer queue in memory without stopping all activity is provided so that no data is lost or accidentally duplicated during the move. There is a software consumer and a hardware producer, such as a host ch
7330488 System, method, and article of manufacture for synchronizing time of day clocks on first and sec February 12, 2008
A system, method, and article of manufacture for synchronizing first and second time-of-day clocks on first and second computers, respectively, are provided. The first and second computers have first and second network interface cards with third and fourth clocks, respectively, there
7283473 Apparatus, system and method for providing multiple logical channel adapters within a single phy October 16, 2007
An apparatus, system and method for providing multiple logical partitions in a system area network are provided Logical partitioning support is provided for host channel adapters which allows multiple operating systems to share the resources of a single physical host channel adapter
7146482 Memory mapped input/output emulation December 5, 2006
A method of managing memory mapped input output operations to an alternate address space comprising: executing a first instruction directed to a first memory mapped input output alternate address space of a machine associated with a first adapter to allocate a resource associated with
7095750 Apparatus and method for virtualizing a queue pair space to minimize time-wait impacts August 22, 2006
Apparatus and method for virtualizing a queue pair space to minimize time-wait impacts. Virtual queue pairs are allocated from a virtual queue pair pool of a node to connections between the node and other nodes. The connection is established between a physical queue pair of the node and
7093024 End node partitioning using virtualization August 15, 2006
A mechanism for allowing a single physical IB node to virtualize a plurality of host channel adapters is provided. This includes providing the appearance of both a router and multiple virtual HCA's residing behind that router, to the external REAL subnet components. Each virtual host
7092401 Apparatus and method for managing work and completion queues using head and tail pointers with e August 15, 2006
An apparatus and method for managing reliable datagram work queues, and associated completion queues, using head and tail pointers with end-to-end context error cache are provided. Reliable datagram (RD) queue head and tail pointers are maintained in the channel interface and the hos
7010633 Apparatus, system and method for controlling access to facilities based on usage classes March 7, 2006
An apparatus, system and method for controlling access to facilities based on usage class of a requestor are provided. With the apparatus, system and method, a two level protection mechanism is provided for protecting host channel adapter (HCA) facilities from unauthorized access. With t
6834332 APPARATUS AND METHOD FOR SWAPPING-OUT REAL MEMORY BY INHIBITING I/O OPERATIONS TO A MEMORY REGIO December 21, 2004
An apparatus and method for swapping out real memory by inhibiting input/output (I/O) operations to a memory region are provided. The apparatus and method provide a mechanism in which a quiesce indicator is provided in a field containing the current outstanding I/O count associated w
6789143 Infiniband work and completion queue management via head and tail circular buffers with indirect September 7, 2004
A distributed computing system having (host and I/O) end nodes, switches, routers, and links interconnecting these components is provided. The end nodes use send and receive queue pairs to transmit and receive messages. The end nodes use completion queues to inform the end user when a me
6785241 Method for pacing buffered data transfers over a network such as fibre channel August 31, 2004
The present invention provides a method for managing transmissions to a remote node having a buffer memory for receiving the transmitted packets and means for acknowledging the receipt of the packets. The method provides for a sender to maintain a sense of the availability of buffer
6748499 Sharing memory tables between host channel adapters June 8, 2004
A method, computer program product, and data processing system for sharing memory protection tables and address translation tables among multiple Host Channel Adapters are disclosed. The protection and address translation tables for a shared memory region are written in memory of the
6725296 Apparatus and method for managing work and completion queues using head and tail pointers April 20, 2004
An apparatus and method for managing work and completion queues using head and tail circular pointers. With the apparatus and method, queue head and tail pointers are maintained in the channel interface and the host channel adapter. The head and tail pointers in the host channel adapter
6691217 Method and apparatus for associating memory windows with memory regions in a data storage system February 10, 2004
A method, program and system for associating memory windows with memory regions in an infiniband data storage system are provided. The invention comprises registering a Memory Region, wherein the Memory Region is a set of virtually contiguous memory addresses defined by a virtual address
6601148 Infiniband memory windows management directly in hardware July 29, 2003
A method, system and program for controlling access to memory areas within a computer are provided. The invention comprises placing a first Bind Work Queue Element (WQE) at the head of a work queue, wherein the first Bind WQE defines parameters associated with a first Memory Window. A se
6578122 Using an access key to protect and point to regions in windows for infiniband June 10, 2003
A method, system and program for controlling access to computer memory are provided. The present invention comprises receiving a work request from a user, wherein the work request comprises an index portion and a protection portion. The index portion of the work request is used to locate


 
 
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