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Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Chuang; Da-Zen
Address:
Taipei, TW
No. of patents:
4
Patents:












Patent Number Title Of Patent Date Issued
6297151 Method and structure for manufacturing contact windows in semiconductor process October 2, 2001
The invention relates to a semiconductor process, and in particular to a method and structure of manufacturing contact windows between different levels of two conductive layers (a upper conductive layer and a lower conductive layer) in the semiconductor process. In the method, first, a
6153900 Method and structure for manufacturing contact windows in semiconductor process November 28, 2000
The invention relates to a semiconductor process, and in particular to a method and structure of manufacturing contact windows between different levels of two conductive layers (a upper conductive layer and a lower conductive layer) in the semiconductor process. In the method, first, a
6025247 Method for manufacturing capacitor structure of dynamic memory cell February 15, 2000
A method is disclosed to manufacture a capacitor structure having a high capacitance and a flat topography on a semiconductor device. The method includes steps of: (a) forming a first insulating layer over a substrate having a transistor structure; (b) forming a first and a second contac
6001709 Modified LOCOS isolation process for semiconductor devices December 14, 1999
A modified LOCOS isolation process for semiconductor devices is disclosed. First, a shielding layer is formed overlying a semiconductor substrate. The shielding layer is then patterned to form an opening that exposes a portion of the semiconductor substrate for forming a device isolation










 
 
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