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Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Choi; Ki Hwan
Address:
Seongnam-si, KR
No. of patents:
2
Patents:




Patent Number Title Of Patent Date Issued
7554386 High voltage generation circuit and method for reducing peak current and power noise for a semic June 30, 2009
A high voltage generation circuit for use with a semiconductor memory device includes a plurality of high voltage generation units and a control circuit. The high voltage generation units generate high voltages having different voltage levels in response to corresponding clock signal
7489558 Program method of flash memory capable of compensating read margin reduced due to charge loss February 10, 2009
The present invention provides a program method of a flash memory device including a plurality of memory cells for storing multi-bit data indicating one of a plurality of states. The memory cells are subjected to a primary program operation. Those memory cells arranged within a speci


 
 
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