Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Cheung; Edmund
Address:
Palo Alto, CA
No. of patents:
6
Patents:












Patent Number Title Of Patent Date Issued
RE43235 Single-block virtual frame buffer translated to multiple physical blocks for multi-block display March 13, 2012
A graphics controller for a System-On-a-Chip (SOC) used with a battery-powered device allows for reduced-power display modes. The microprocessor writes to a frame buffer that is a single, contiguous address block in virtual memory. A memory management unit (MMU) translates frame-buff
RE41967 Single-block virtual frame buffer translated to multiple physical blocks for multi-block display November 30, 2010
A graphics controller for a System-On-a-Chip (SOC) used with a battery-powered device allows for reduced-power display modes. The microprocessor writes to a frame buffer that is a single, contiguous address block in virtual memory. A memory management unit (MMU) translates frame-buff
RE39963 System and method for dynamic clock generation December 25, 2007
An application specific integrated circuit (ASIC) has a clock controller that dynamically selects an appropriate clock frequency for a resource. The ASIC includes a central processing unit (CPU), on-chip memory, a memory controller controlling external memory devices, a system bus, and
7400328 Complex-shaped video overlay using multi-bit row and column index registers July 15, 2008
A graphics system reduces fetching from memory of color-key pixels when video pixels from a video-overlay window are displayed. A frame buffer is divided into multi-line, multi-pixel blocks that are arranged in block-rows and block-columns. Each block-row has primary and secondary ro
6680738 Single-block virtual frame buffer translated to multiple physical blocks for multi-block display January 20, 2004
A graphics controller for a System-On-a-Chip (SOC) used with a battery-powered device allows for reduced-power display modes. The microprocessor writes to a frame buffer that is a single, contiguous address block in virtual memory. A memory management unit (MMU) translates frame-buff
6564329 System and method for dynamic clock generation May 13, 2003
An application specific integrated circuit (ASIC) has a clock controller that dynamically selects an appropriate clock frequency for a resource. The ASIC includes a central processing unit (CPU), on-chip memory, a memory controller controlling external memory devices, a system bus, and










 
 
  Recently Added Patents
Proximity search methods using tiles to represent geographical zones
Resistive memory element sensing using averaging
Optical article comprising a temporary anti-fogging coating with improved durability
Pluggable power cell for an inverter
Stabilization of dicarbonate diesters with protonic acids
Method and apparatus for focusing electrical stimulation in the brain during electro-convulsive therapy
Decrementing settings for a range of power caps when a power cap is exceeded
  Randomly Featured Patents
Semiconductor device
Implement assembly for hydraulically operated excavators
Washer pump and motor brush support structure
Surgical apparatus
Charge management of electrically isolated objects via modulated photoelectric charge transfer
Method and apparatus for reducing for reducing acoustic emission from submerged submarines
Apparatus and method for providing breathable air to safe havens within a mine
Control apparatus of storage unit, and method of controlling the control apparatus of storage unit
Anti-plug reversing module
Unitary cartridge for particle processing