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Inventor: Chen; Mary Y.
Address: Oak Park, CA
No. of patents: 4
Patents:
| Patent Number |
Title Of Patent |
Date Issued |
| 7582536 |
Electronic device with reduced interface charge between epitaxially grown layers and a method fo |
September 1, 2009 |
| An electronic device contains a substrate, a sub-collector supported by the substrate, an un-doped layer having a selectively implanted buried sub-collector and supported by the sub-collector, an As-based nucleation layer partially supported by the un-doped layer, a collector layer s |
| 7531851 |
Electronic device with reduced interface charge between epitaxially grown layers and a method fo |
May 12, 2009 |
| An electronic device contains a substrate, a sub-collector supported by the substrate, an un-doped layer having a selectively implanted buried sub-collector and supported by the sub-collector, an As-based nucleation layer partially supported by the un-doped layer, a collector layer s |
| 7470619 |
Interconnect with high aspect ratio plugged vias |
December 30, 2008 |
| Described is a method for forming a stackable interconnect. The interconnect is formed by depositing a first contact on a substrate; depositing a seed layer (SL) on the substrate; depositing a metal mask layer (MML) on the SL; depositing a bottom anti-reflection coating (BARC) on the |
| 7259444 |
Optoelectronic device with patterned ion implant subcollector |
August 21, 2007 |
| In one embodiment, an optoelectronic device is provided having a pin photo diode including a semi-insulating substrate or layer, with a patterned implant region of a first dopant type. The pin photo diode includes an upper layer having semiconductor material with a second dopant type. An |
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