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Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Chen; An
Address:
Sunnyvale, CA
No. of patents:
14
Patents:












Patent Number Title Of Patent Date Issued
8207757 Nonvolatile CMOS-compatible logic circuits and related operating methods June 26, 2012
Apparatus and related fabrication and operating methods are provided for logic circuits that include ferromagnetic elements. An exemplary logic circuit includes a first ferromagnetic element having a first ferromagnetic layer, a second ferromagnetic element having a second ferromagne
8084770 Test structures for development of metal-insulator-metal (MIM) devices December 27, 2011
In the present electronic test structure comprising, a conductor is provided, overlying a substrate. An electronic device overlies a portion of the conductor and includes a first electrode connected to the conductor, a second electrode, and an insulating layer between the first and s
8035099 Diode and resistive memory device structures October 11, 2011
In an electronic device, a diode and a resistive memory device are connected in series. The diode may take a variety of forms, including oxide or silicon layers, and one of the layers of the diode may make up a layer of the resistive memory device which is in series with that diode.
7993986 Sidewall graphene devices for 3-D electronics August 9, 2011
A device is provided that includes a structure having a sidewall surface, a layer of material provided on the sidewall surface, and a device structure provided in contact with the layer of material. Fabrication techniques includes a process that includes forming a structure having a
7939247 Process of patterning small scale devices May 10, 2011
A process is provided that includes forming a first mask on an underlying layer, where the mask has two adjacent portions with an open gap therebetween, and depositing a second mask material within the open gap and at an inclined angle with respect to an upper surface of the underlyi
7916523 Method of erasing a resistive memory device March 29, 2011
In a first method of erasing a resistive memory device, an electrical potential is applied to the gate of a transistor in series with the resistive memory device, and successive increasing currents are provided through the resistive memory device by means of providing successive incr
7858990 Device and process of forming device with pre-patterned trench and graphene-based device structu December 28, 2010
A graphene-based device is formed with a trench in one or more layers of material, a graphene layer within the trench, and a device structure on the graphene layer and within the trench. Fabrication techniques includes forming a trench defined by one or more layers of material, forming a
7858989 Device and process of forming device with device structure formed in trench and graphene layer f December 28, 2010
A graphene-based device is formed with a substrate having a trench therein, a device structure on the substrate and within the trench, a graphene layer over the device structure, and a protective layer over the graphene layer. Fabrication techniques include forming a trench in a subs
7746698 Programming in memory devices using source bitline voltage bias June 29, 2010
Systems and methods that facilitate improved programming memory cells in a nonvolatile memory (e.g., flash memory) are presented. An optimized voltage component can facilitate supplying respective voltages to a source, drain, and gate associated with a memory cell during operations,
7646624 Method of selecting operating characteristics of a resistive memory device January 12, 2010
In a method of providing an operating characteristic of a resistive memory device, material of an electrode thereof is selected to in turn provide a selected operating characteristic of the device. The material of the electrode may be reacted with material of an insulating layer of the
7468525 Test structures for development of metal-insulator-metal (MIM) devices December 23, 2008
In the present electronic test structure comprising, a conductor is provided, overlying a substrate. An electronic device overlies a portion of the conductor and includes a first electrode connected to the conductor, a second electrode, and an insulating layer between the first and s
7384800 Method of fabricating metal-insulator-metal (MIM) device with stable data retention June 10, 2008
In the method of fabricating a metal-insulator-metal (MIM) device, a first electrode of .alpha.-Ta is provided. The Ta of the first electrode is oxidized to form a Ta.sub.2O.sub.5 layer on the first electrode. A second electrode of .beta.-Ta is provided on the Ta.sub.2O.sub.5 layer. Such
7289351 Method of programming a resistive memory device October 30, 2007
In an embodiment of a method of programming a resistive memory device, an electrical potential is applied to the gate of a transistor operatively associated with the resistive memory device, and successive, increasing electrical potentials are applied across the resistive memory device.
7286388 Resistive memory device with improved data retention October 23, 2007
In the present method of programming a memory device from an erased state, the memory device includes first and second electrodes, a passive layer between the first and second electrodes, and an active layer between the first and second electrodes. In the programming method, (i) an elect










 
 
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