Resources Contact Us Home Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE     Inventor: Chanclou; Roland Address: Perthess, FR No. of patents: 1 Patents: Patent Number Title Of Patent Date Issued 5112765 Method of forming stacked tungsten gate PFET devices and structures resulting therefrom May 12, 1992 A manufacturing method is provided for producing a stacked semiconductor structure including: depositing a first thick passivating layer onto the base structure; forming first stud openings in the first thick passivating layer exposing at least one active region and/or one of the polysil       Recently Added Patents Motor protector attachment system Readers and scanner design pattern Compact electrochemical converter Method and system for label edge routing in a wireless network Compact cryogenic plant Information recording method, information recording medium, and information reproducing method, wherein information is stored on a data recording portion and a management information recording Aequorin as a growth marker in yeast   Randomly Featured Patents Thermoelectrochemical cyclical process for production of hydrogen and oxygen from water Fibre-reactive dyes and dye mixtures and their use Independent hysteresis apparatus for tone detection 2-amino-nicotinamide derivatives and their use as VEGF-receptor tyrosine kinase inhibitors Recessed compression latch Metal-ceramic composite and method of producing the same Method for spacer patterned, high dielectric constant capacitor Illuminated implement apparatus Modulators of protein tyrosine phosphatases (PTPases) Method for removing resist from semiconductor device © 2006. PatentGenius. All Rights Reserved.