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Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Bubna; Kishore
Address:
Fremont, CA
No. of patents:
8
Patents:




Patent Number Title Of Patent Date Issued
7602958 Mirror node process verification October 13, 2009
An inspection image analysis system. At least one image processing computer is configured to receive and analyze at least one portion of an image. At least one test computer is configured to receive at least one common portion of the image also received by the at least one image proc
7555409 Daisy chained topology June 30, 2009
An inspection system. The inspection system has a sensor for generating data. A first network is coupled to the sensor and communicates the data. An array of nodes is coupled to the first network, and processes the data to produce reports. Each node has an interface coupled to the first
7379838 Programmable image computer May 27, 2008
An inspection system for detecting anomalies on a substrate. A first network is coupled to a sensor array and communicates data. Process nodes are coupled to the first network, and process the data to produce reports. Each process node has an interface card that formats the data for
7251586 Full swath analysis July 31, 2007
An inspection system for detecting anomalies on a substrate. A first network is coupled to the sensor array and communicates image data. Process nodes are couple to the first network, and process the data to produce reports. Each process node has an interface card that formats the da
7181368 Status polling February 20, 2007
An inspection system for detecting anomalies on a substrate. The inspection system has a sensor array for generating image data. A first high speed network is coupled to the sensor array and receives and communicates the image data. An array of process nodes is coupled to the first h
7149642 Programmable image computer December 12, 2006
An inspection system for detecting anomalies on a substrate. A first network is coupled to a sensor array and communicates data. Process nodes are coupled to the first network, and process the data to produce reports. Each process node has an interface card that formats the data for
7076390 Memory load balancing July 11, 2006
An inspection system for detecting anomalies on a substrate. A first network is coupled to a sensor array and communicates data. Process nodes are coupled to the first network, and process the data to produce reports. Each process node includes memory sufficient to buffer the data un
7024339 Full swath analysis April 4, 2006
An inspection system for detecting anomalies on a substrate. A first network is coupled to a sensor array and communicates image data. Process nodes are coupled to the first network, and processes the data to produce reports. Each process node has an interface card that formats the data


 
 
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