| Patent Number |
Title Of Patent |
Date Issued |
| 8124505 |
Two stage plasma etching method for enhancement mode GaN HFET |
February 28, 2012 |
| A two stage plasma etching technique is described that allows the fabrication of an enhancement mode GaN HFET/HEMT. A gate recess area is formed in the Aluminum Gallium Nitride barrier layer of an GaN HFET/HEMT. The gate recess is formed by a two stage etching process. The first stage |
| 7151307 |
Integrated semiconductor circuits on photo-active Germanium substrates |
December 19, 2006 |
| A semiconductor device having at least one layer of a group III V semiconductor material epitaxially deposited on a group III V nucleation layer adjacent to a germanium substrate. By introducing electrical contacts on one or more layers of the semiconductor device, various optoelectr |
| 6635507 |
Monolithic bypass-diode and solar-cell string assembly |
October 21, 2003 |
| An apparatus and method are described for making a solar cell with an integrated bypass diode. The method comprises the steps of depositing a second layer having a first type of dopant on a first layer having an opposite type of dopant to the first type of dopant to form a solar cell, |
| 6350944 |
Solar module array with reconfigurable tile |
February 26, 2002 |
| A reconfigurable solar panel system having a plurality of solar cells arranged in a predefined pattern on a printed circuit board having a predefined pattern of interconnection paths to form at least one solar cell module. The solar panel being made of at least one solar cell module |
