| Patent Number |
Title Of Patent |
Date Issued |
| 7411249 |
Lateral high-voltage transistor with vertically-extended voltage-equalized drift region |
August 12, 2008 |
| A lateral high-voltage device in which conductive trench plates are inserted across the voltage-withstand region, so that, in the on state, the current density vectors have less convergence. This can help reduce on-resistance. |
| 7397097 |
Integrated released beam layer structure fabricated in trenches and manufacturing method thereof |
July 8, 2008 |
| A released beam structure fabricated in trench and manufacturing method thereof are provided herein. One embodiment of a released beam structure according to the present invention comprises a semiconductor substrate, a trench, a first conducting layer, and a beam. The trench extends into |
| 7339252 |
Semiconductor having thick dielectric regions |
March 4, 2008 |
| A method of manufacturing a semiconductor device includes providing a semiconductor substrate having first and second main surfaces opposite to each other. The method also includes providing in the semiconductor substrate one or more trenches, first mesas and second mesas. The method |
| 7304347 |
Method for fabricating a power semiconductor device having a voltage sustaining layer with a ter |
December 4, 2007 |
| A method is provided for forming a power semiconductor device. The method begins by providing a substrate of a first conductivity type and then forming a voltage sustaining region on the substrate. The voltage sustaining region is formed by depositing an epitaxial layer of a first co |
| 7244970 |
Low capacitance two-terminal barrier controlled TVS diodes |
July 17, 2007 |
| A two-terminal barrier controlled TVS diode has a depletion region barrier blocking majority carrier flow through the channel region at the vicinity of the cathode region at bias levels below the predetermined clamping voltage applied between the anode electrode and the cathode electrode |
| 7224027 |
High voltage power MOSFET having a voltage sustaining region that includes doped columns formed |
May 29, 2007 |
| A method is provided for forming a power semiconductor device. The method begins by providing a substrate of a first or second conductivity type and then forming a voltage sustaining region on the substrate. The voltage sustaining region is formed by depositing an epitaxial layer of a |
| 7202494 |
FINFET including a superlattice |
April 10, 2007 |
| A semiconductor device may include at least one fin field-effect transistor (FINFET) comprising a fin, source and drain regions adjacent opposite ends of the fin, and a gate overlying the fin. The fin may include at least one superlattice including a plurality of stacked groups of la |
| 7199427 |
DMOS device with a programmable threshold voltage |
April 3, 2007 |
| A DMOS device is provided which is equipped with a floating gate having a first and second electrode in close proximity thereto. The floating gate is separated from one of the first and second electrodes by a thin layer of dielectric material whose dimensions and composition permit charg |
| 7138289 |
Technique for fabricating multilayer color sensing photodetectors |
November 21, 2006 |
| A multilayer color-sensing photodetector is fabricated in a semiconductor wafer having a single crystal structure to form a first, second and third layer of single crystal semiconductor material. A dielectric layer is formed that completely surrounds each single crystal region. A blockin |
| 7094621 |
Fabrication of diaphragms and "floating" regions of single crystal semiconductor for MEMS device |
August 22, 2006 |
| A single crystal semiconductor region is fabricated in a semiconductor wafer. The region is either cantilevered, supported at one or both ends, or midpoint, or supported at multiple locations. After a pattern and etch step, a dielectric fill step is performed to define the boundaries of |
| 7091552 |
High voltage power MOSFET having a voltage sustaining region that includes doped columns formed |
August 15, 2006 |
| A power semiconductor device is made in accordance with a method of providing a substrate of a first or second conductivity type and then forming a voltage sustaining region on the substrate. The voltage sustaining region is formed by depositing an epitaxial layer of a first conducti |
| 7084455 |
Power semiconductor device having a voltage sustaining region that includes terraced trench with |
August 1, 2006 |
| A method is provided for forming a power semiconductor device. The method begins by providing a substrate of a first conductivity type and forming a voltage sustaining region on the substrate. The voltage sustaining region is formed in the following manner. First, an epitaxial layer is |
| 7067376 |
High voltage power MOSFET having low on-resistance |
June 27, 2006 |
| A power MOSFET is provided that includes a substrate of a first conductivity type. An epitaxial layer also of the first conductivity type is deposited on the substrate. First and second body regions are located in the epitaxial layer and define a drift region between them. The body r |
| 7061072 |
Integrated circuit inductors using driven shields |
June 13, 2006 |
| An integrated circuit is disclosed that includes a semiconductor substrate having a major body portion with a conductive layer having a predefined boundary and located on a first surface of the major body portion. An insulating layer is located over the conductive layer, over which an |
| 7023069 |
Method for forming thick dielectric regions using etched trenches |
April 4, 2006 |
| A method of manufacturing a semiconductor device includes providing a semiconductor substrate having first and second main surfaces opposite to each other. The method also includes providing in the semiconductor substrate one or more trenches, first mesas and second mesas. The method |
| 7019360 |
High voltage power mosfet having a voltage sustaining region that includes doped columns formed |
March 28, 2006 |
| A method is provided for forming a power semiconductor device. The method begins by providing a substrate of a first conductivity type and then forming a voltage sustaining region on the substrate. The voltage sustaining region is formed by depositing an epitaxial layer of a first co |
| 7015104 |
Technique for forming the deep doped columns in superjunction |
March 21, 2006 |
| A method of manufacturing a semiconductor device is disclosed and starts with a semiconductor substrate having a heavily doped N region of at the bottom main surface and having a lightly doped N region at the top main surface. There are a plurality of trenches in the substrate, with each |
| 6992350 |
High voltage power MOSFET having low on-resistance |
January 31, 2006 |
| A power MOSFET is provided that includes a substrate of a first conductivity type. An epitaxial layer also of the first conductivity type is deposited on the substrate. First and second body regions are located in the epitaxial layer and define a drift region between them. The body r |
| 6949432 |
Trench DMOS transistor structure having a low resistance path to a drain contact located on an u |
September 27, 2005 |
| A trench DMOS transistor structure having a low resistance path to a drain contact located on an upper surface and methods of making the same. The transistor structure comprises: (1) a first region of semiconductor material of a first conductivity type; (2) a gate trench formed within th |
| 6921938 |
Double diffused field effect transistor having reduced on-resistance |
July 26, 2005 |
| A double diffused field effect transistor and a method of forming the same is provided. The method begins by providing a substrate of a first conductivity type. Next, at least one dopant species, also of the first conductivity type, is introduced into a surface of the substrate so that |
| 6906529 |
Capacitive sensor device with electrically configurable pixels |
June 14, 2005 |
| Each pixel of an array has a subarray of upper capacitor plates located just beneath a sensing surface. The upper plates may be square and laid out in an equal number of rows and columns. Each upper plate can be selectively electrically connected to one of two lower capacitor plates |
| 6882573 |
DMOS device with a programmable threshold voltage |
April 19, 2005 |
| A DMOS device is provided which is equipped with a floating gate having a first and second electrode in close proximity thereto. The floating gate is separated from one of the first and second electrodes by a thin layer of dielectric material whose dimensions and composition permit charg |
| 6861337 |
Method for using a surface geometry for a MOS-gated device in the manufacture of dice having dif |
March 1, 2005 |
| A surface geometry for a MOS-gated device is provided that allows device size to be varied in both the x-axis and the y-axis by predetermined increments. The actual device size is set or "programmed" by the metal and pad masks or the contact metal and pad masks. This approach saves both |
| 6812526 |
Trench DMOS transistor structure having a low resistance path to a drain contact located on an u |
November 2, 2004 |
| A trench DMOS transistor structure having a low resistance path to a drain contact located on an upper surface and methods of making the same. The transistor structure comprises: (1) a first region of semiconductor material of a first conductivity type; (2) a gate trench formed within th |
| 6812056 |
Technique for fabricating MEMS devices having diaphragms of "floating" regions of single crystal |
November 2, 2004 |
| A single crystal semiconductor region is fabricated in a semiconductor wafer. The region is either cantilevered, supported at one or both ends, or midpoint, or supported at multiple locations. After a pattern and etch step, a dielectric fill step is performed to define the boundaries of |
| 6794251 |
Method of making a power semiconductor device |
September 21, 2004 |
| A method is provided for forming a power semiconductor device. The method begins by providing a substrate of a first or second conductivity type and then forming a voltage sustaining region on the substrate. The voltage sustaining region is formed by depositing an epitaxial layer of a fi |
| 6790745 |
Fabrication of dielectrically isolated regions of silicon in a substrate |
September 14, 2004 |
| A method for manufacturing a semiconductor device comprising of the steps of creating an oxide layer on a first surface of an epitaxial layer having damage layer located at a predetermined depth from the first surface, the damaged layer being in parallel alignment with the first surface. |
| 6777745 |
Symmetric trench MOSFET device and method of making same |
August 17, 2004 |
| A trench MOSFET transistor device and method of making the same are provided. The trench MOSFET transistor device comprises: (a) a drain region of first conductivity type; (b) a body region of a second conductivity type provided over the drain region, such that the drain region and t |
| 6750523 |
Photodiode stacks for photovoltaic relays and the method of manufacturing the same |
June 15, 2004 |
| A series of connections of photodiodes has a plurality of alternating N-type conductivity surface areas with P-type conductivity surface areas with each member of the P-type conductivity surface areas being separated by a member of N-type conductivity surface areas. Metal conductors conn |
| 6750104 |
High voltage power MOSFET having a voltage sustaining region that includes doped columns formed |
June 15, 2004 |
| A method is provided for forming a power semiconductor device. The method begins by providing a substrate of a first conductivity type and then forming a voltage sustaining region on the substrate. The voltage sustaining region is formed by depositing an epitaxial layer of a first co |
| 6734495 |
Two terminal programmable MOS-gated current source |
May 11, 2004 |
| A DMOS device is provided which is equipped with a floating gate having a first and second electrode in close proximity thereto. The floating gate is separated from one of the first and second electrodes by a thin layer of dielectric material whose dimensions and composition permit charg |
| 6730963 |
Minimum sized cellular MOS-gated device geometry |
May 4, 2004 |
| A semiconductor device is disclosed and includes a drain region of a first conductivity type, having a first major surface. Diffused into the drain region is a body region of a second conductivity type. A source region is diffused in the body region and it has a general polygonal shape w |
| 6724044 |
MOSFET device having geometry that permits frequent body contact |
April 20, 2004 |
| A MOSFET device design is provided that effectively addresses the problems arising from the parasitic bipolar transistor that is intrinsic to the device. The MOSFET device comprises: (a) a body region; (b) a plurality of body contact regions; (c) a plurality of source regions; (d) a plur |
| 6713351 |
Double diffused field effect transistor having reduced on-resistance |
March 30, 2004 |
| A double diffused field effect transistor and a method of forming the same is provided. The method begins by providing a substrate of a first conductivity type. Next, at least one dopant species, also of the first conductivity type, is introduced into a surface of the substrate so that |
| 6710414 |
Surface geometry for a MOS-gated device that allows the manufacture of dice having different siz |
March 23, 2004 |
| A surface geometry for a MOS-gated device is provided that allows device size to be varied in both the x-axis and the y-axis by predetermined increments. The actual device size is set or "programmed" by the metal and pad masks or the contact metal and pad masks. This approach saves both |
| 6710400 |
Method for fabricating a high voltage power MOSFET having a voltage sustaining region that inclu |
March 23, 2004 |
| A method for fabricating a high voltage power MOSFET having a voltage sustaining region that includes doped columns formed by rapid diffusion. A high voltage semiconductor device having a substrate of a first or second conductivity type, an epitaxial layer of the first conductivity on th |
| 6689662 |
Method of forming a high voltage power MOSFET having low on-resistance |
February 10, 2004 |
| A power MOSFET is provided that includes a substrate of a first conductivity type. An epitaxial layer also of the first conductivity type is deposited on the substrate. First and second body regions are located in the epitaxial layer and define a drift region between them. The body r |
| 6686244 |
Power semiconductor device having a voltage sustaining region that includes doped columns formed |
February 3, 2004 |
| A method is provided for forming a power semiconductor device. The method begins by providing a substrate of a first conductivity type and forming a voltage sustaining region on the substrate. The voltage sustaining region is formed in the following manner. First, an epitaxial layer is d |
| 6660571 |
High voltage power MOSFET having low on-resistance |
December 9, 2003 |
| A power MOSFET is provided that includes a substrate of a first conductivity type. An epitaxial layer also of the first conductivity type is deposited on the substrate. First and second body regions are located in the epitaxial layer and define a drift region between them. The body r |
| 6656797 |
High voltage power MOSFET having a voltage sustaining region that includes doped columns formed |
December 2, 2003 |
| A method is provided for forming a power semiconductor device. The method begins by providing a substrate of a first or second conductivity type and then forming a voltage sustaining region on the substrate. The voltage sustaining region is formed by depositing an epitaxial layer of a fi |
| 6649477 |
Method for fabricating a power semiconductor device having a voltage sustaining layer with a ter |
November 18, 2003 |
| A method is provided for forming a power semiconductor device. The method begins by providing a substrate of a first conductivity type and then forming a voltage sustaining region on the substrate. The voltage sustaining region is formed by depositing an epitaxial layer of a first co |
| 6627949 |
High voltage power MOSFET having low on-resistance |
September 30, 2003 |
| A power MOSFET is provided that includes a substrate of a first conductivity type. An epitaxial layer also of the first conductivity type is deposited on the substrate. First and second body regions are located in the epitaxial layer and define a drift region between them. The body r |
| 6624494 |
Method for fabricating a power semiconductor device having a floating island voltage sustaining |
September 23, 2003 |
| A power semiconductor device and a method of forming the same is provided. The method begins by providing a substrate of a first conductivity type and then forming a voltage sustaining region on the substrate. The voltage sustaining region is formed by depositing an epitaxial layer of a |
| 6621107 |
Trench DMOS transistor with embedded trench schottky rectifier |
September 16, 2003 |
| A merged device is that comprises a plurality of MOSFET cells and a plurality of Schottky rectifier cells, as well as a method of designing and making the same. According to an embodiment of the invention, the MOSFET cells comprise: (a) a source region of first conductivity type form |
| 6593619 |
High voltage power MOSFET having low on-resistance |
July 15, 2003 |
| A power MOSFET is provided that includes a substrate of a first conductivity type. An epitaxial layer also of the first conductivity type is deposited on the substrate. First and second body regions are located in the epitaxial layer and define a drift region between them. The body r |
| 6593174 |
Field effect transistor having dielectrically isolated sources and drains and method for making |
July 15, 2003 |
| A field-effect transistor and a method for its fabrication is described. The transistor includes a monocrystalline semiconductor channel region overlying and epitaxially continuous with a body region of a semiconductor substrate. First and second semiconductor source/drain regions latera |
| 6576516 |
High voltage power MOSFET having a voltage sustaining region that includes doped columns formed |
June 10, 2003 |
| A method is provided for forming a power semiconductor device. The method begins by providing a substrate of a first or second conductivity type and then forming a voltage sustaining region on the substrate. The voltage sustaining region is formed by depositing an epitaxial layer of a fi |
| 6566201 |
Method for fabricating a high voltage power MOSFET having a voltage sustaining region that inclu |
May 20, 2003 |
| A method for fabricating a high voltage power MOSFFT having a voltage sustaining region that includes doped columns formed by rapid diffusion. A high voltage semiconductor device having a substrate of a first or second conductivity type, an epitaxial layer of the first conductivity on th |
| 6538279 |
High-side switch with depletion-mode device |
March 25, 2003 |
| A technique for supplying drive voltage to the gate of a high-side depletion-mode N-channel MOS-device for high-side switches or any circuit with a depletion-mode N-channel MOS-device with its source at a voltage above local ground. |
| 6492663 |
Universal source geometry for MOS-gated power devices |
December 10, 2002 |
| A semiconductor device is disclosed and includes a drain region of a first conductivity type, having a first major surface. Diffused into the drain region is a body region of a second conductivity type. A source region is diffused in the body region and it has a general polygonal shape w |
