| Patent Number |
Title Of Patent |
Date Issued |
| RE38471 |
Method and apparatus for display image rotation |
March 23, 2004 |
| A method and an apparatus for rotating images on a computer system is disclosed. The system includes a processor for accessing an image frame buffer using a set of CPU addresses, a memory for storing the frame buffer, a controller for directing the pixel data of the frame buffer to a |
| 5951669 |
Method and apparatus for serialized interrupt transmission |
September 14, 1999 |
| A computer system in which interrupt signals are serially transmitted from an input/output (I/O) controller is disclosed. The I/O controller initially receives the interrupt signals and then serially transmits them to an interrupt controller where the received interrupt signals are m |
| 5933154 |
Multi-panel video display control addressing of interleaved frame buffers via CPU address conver |
August 3, 1999 |
| A method and an apparatus for interleaving display frame buffers for use by multi-panel display(s) is disclosed. The system provides a data addressing transformation apparatus for converting CPU addresses for pixel positions of the multiple panels of display screen(s) to corresponding me |
| 5929868 |
Method and apparatus for computer display memory management |
July 27, 1999 |
| A method and an apparatus for interleaving display frame buffers is disclosed. The system includes a processor providing CPU addresses for peripheral (access, a display system, a single memory system for storing multiple frame buffers, data buses for transferring image information and |
| 5854641 |
Method and apparatus for display image rotation |
December 29, 1998 |
| A method and an apparatus for rotating images on a computer system is disclosed. The system includes a processor for accessing an image frame buffer using a set of CPU addresses, a memory for storing the frame buffer, a controller for directing the pixel data of the frame buffer to a |
| 5815043 |
Frequency controlled ring oscillator having by passable stages |
September 29, 1998 |
| An improved ring oscillator in which frequency drift is controlled to provide reasonable accuracy is disclosed. The improved ring oscillator eliminates the frequency drift due processing variances. The ring oscillator provided by the invention incurs substantially less frequency drif |
| 5625386 |
Method and apparatus for interleaving display buffers |
April 29, 1997 |
| A method and an apparatus for interleaving display frame buffers is disclosed. The system includes a processor providing CPU addresses for peripheral access, a display system, a single memory system for storing multiple frame buffers, data buses for transferring image information and |
| 5461649 |
Method and apparatus for maintaining a state of a state machine during unstable clock conditions |
October 24, 1995 |
| An apparatus and method for protecting the state of a state machine from an unstable clock signal. The apparatus of one embodiment includes a state register having an input and a first output which provides an output signal corresponding to the state of the state machine and a set or res |
| 5257350 |
Computer with self configuring video circuitry |
October 26, 1993 |
| A computer having a video circuit which is configured by a monitor identification signal is described. The self-configuring circuit permits connection to a variety of monitor types without the need for a separate video card or other dedicated circuitry compatible with the specific mo |
| 5167024 |
Power management for a laptop computer with slow and sleep modes |
November 24, 1992 |
| A power manager within a portable laptop computer provides power and clocking control to various units within the computer in order to conserve battery power. Transistor switches controlled by the power manager control the distribution of power and/or clock signals to the various units w |
| 5151997 |
Computer with adaptable video circuitry |
September 29, 1992 |
| A computer which provides a video signal for display is disclosed. The computer has a central processing unit (CPU) which executes a program to provide video data for a display which is organized as a matrix of pixel elements, each pixel element being represented by a certain number of b |
