| Patent Number |
Title Of Patent |
Date Issued |
| 7555709 |
Method and apparatus for stream based markup language post-processing |
June 30, 2009 |
| Systems, methods and apparatus operate to receiving a markup processing program containing a set of markup processing instructions. Each markup processing instruction includes an operation defining a processing operation to be matched to a markup language representation and a corresp |
| 7454696 |
Method and apparatus for stream based markup language post-processing |
November 18, 2008 |
| Systems, methods and apparatus operate to receiving a markup processing program containing a set of markup processing instructions. Each markup processing instruction includes an operation defining a processing operation to be matched to a markup language representation and a corresp |
| 7318194 |
Methods and apparatus for representing markup language data |
January 8, 2008 |
| A representation of a markup language data such as XML expressed as a sequence of encoded items provides a data format including a type field containing i) a construct type identifying a type of markup language data construct to which the encoded item corresponds or, ii) a directive type |
| 7287217 |
Method and apparatus for processing markup language information |
October 23, 2007 |
| Information represented in text-based markup languages, such as XML, is often a large, highly nested structure corresponding to complex patterns of metadata and/or data. Parsing such data streams via conventional software mechanisms rapidly exhibits degrading performance as the size, |
| 6408367 |
Data path architecture and arbitration scheme for providing access to a shared system resource |
June 18, 2002 |
| A system interconnect architecture and associated arbitration scheme that provides for the interleaving of multiple accesses to a shared system resource by multiple system components on a data block by data block basis. According to one embodiment, an access request is granted "immed |
| 5983327 |
Data path architecture and arbitration scheme for providing access to a shared system resource |
November 9, 1999 |
| A system interconnect architecture and associated arbitration scheme that provides for the interleaving of multiple accesses to a shared system resource by multiple components on a data block by data block basis. According to one embodiment, an access request is granted "immediately" |
| 5133059 |
Computer with multiple processors having varying priorities for access to a multi-element memory |
July 21, 1992 |
| A parallel processing computer is disclosed in which a plurality of memory elements (e.g., caches) are accessable by a plurality of processors, and in which a fixed access priority for the processors is varied periodically to reduce differences in processing times between the processors |
