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Abe; Minoru
Itami, JP
No. of patents:

Patent Number Title Of Patent Date Issued
5602552 D/A converter capable of disabling the output February 11, 1997
A digital/analog converting circuit wherein, on the digital signal input side of each of resistances D.sub.1, D.sub.2 . . . D.sub.n whose one end being connected to a digital signal input and the other end to an analog signal output, each of the three-state non-inverting buffers B.sub.1,

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