| Patent Number |
Title Of Patent |
Date Issued |
| RE37059 |
Wiring pattern of semiconductor integrated circuit device |
February 20, 2001 |
| As shown in FIG. 4, a wiring pattern of a semiconductor integrated circuit device of the present invention comprises a wiring portion extending from a connection hole and a connection portion located on the connection hole and having a matching allowance with respect to said connection h |
| 7623937 |
Semiconductor device manufacturing system and method for manufacturing semiconductor devices inc |
November 24, 2009 |
| The present invention provides a solution for interleaving data frames, in a semiconductor device manufacturing system in which the processing apparatus for conducting a process on any one of a semiconductor substrate and a thin film on a surface thereof; a self-diagnostic system for |
| 7433446 |
Image capturing apparatus, control method thereof, program, and image capturing system |
October 7, 2008 |
| An image capturing apparatus includes an image sensing unit that receives X-rays and converts the received X-ray signal into an image signal, a control unit that controls the image capturing apparatus, including image capturing using the image sensing unit, and a communication unit i |
| 6531946 |
Low noise and low loss reactor |
March 11, 2003 |
| A wound and laminated iron core is formed by winding a soft magnetic thin strip into a circular ring shape or elliptical ring shape. A coil is then wound around almost an entire outer periphery of the ring of wound and laminated iron core. A cross sectional shape of the wound and laminat |
| 6167583 |
Double side cleaning apparatus for semiconductor substrate |
January 2, 2001 |
| A double side cleaning apparatus includes a pair of roll-like brushes and at least one cleaning brush. The roll-like brushes are driven to rotate in opposite directions, and a semiconductor wafer is arranged between them in a non-contact manner. The cleaning brush is arranged near the pa |
| 6069083 |
Polishing method, semiconductor device fabrication method, and semiconductor fabrication apparat |
May 30, 2000 |
| Chemical mechanical polisher is disclosed. A polishing slurry stored in a polishing slurry tank, used in this polishing contains a solvent and polishing particles dispersed in the solvent. The polishing particles are selected from silicon nitride, silicon carbide, and graphite. The mater |
| 6045605 |
Abrasive material for polishing a semiconductor wafer, and methods for manufacturing and using t |
April 4, 2000 |
| An abrasive material is prepared by dispersing silicon nitride particles acting as abrasive particles in a solvent such as a pure water or an ultra pure water, followed by adding an adsorptive stickable to the abrasive particles to the dispersion. The resultant abrasive material permits |
| 5968239 |
Polishing slurry |
October 19, 1999 |
| A polishing slurry for use in chemical mechanical polishing is disclosed. The polishing slurry contains a solvent and polishing particles dispersed in this solvent. The polishing particles are selected from silicon nitride, silicon carbide, and graphite. The primary particle size of the |
| 5861054 |
Polishing slurry |
January 19, 1999 |
| A polishing slurry for use in chemical mechanical polishing is disclosed. The polishing slurry contains a solvent and polishing particles dispersed in this solvent. The polishing particles are selected from silicon nitride, silicon carbide, and graphite. The primary particle size of the |
| 5786267 |
Method of making a semiconductor wafer with alignment marks |
July 28, 1998 |
| Disclosed is an alignment mark for the X directional alignment of a chip area on a semiconductor wafer, for example. The alignment mark comprises recesses and projections formed on a semiconductor substrate. The recesses or projections are repeatedly arranged in the X direction. The X |
| 5532520 |
Semiconductor wafer with alignment marks |
July 2, 1996 |
| Disclosed is an alignment mark for the X directional alignment of a chip area on a semiconductor wafer, for example. The alignment mark comprises recesses and projections formed on a semiconductor substrate. The recesses or projections are repeatedly arranged in the X direction. The X |
| 5523627 |
Wiring pattern of semiconductor integrated circuit device |
June 4, 1996 |
| As shown in FIG. 4, a wiring pattern of a semiconductor integrated circuit device of the present invention comprises a wiring portion extending from a connection hole and a connection portion located on the connection hole and having a matching allowance with respect to said connection h |
| 5489337 |
Apparatus for applying organic material to semiconductor wafer in which the nozzle opening adjus |
February 6, 1996 |
| An organic material applying apparatus of the present invention includes a movable organic material discharge nozzle having an organic material discharge port for discharging an organic material at a position facing a semiconductor wafer. The opening width of the discharge port is ad |
| 5411916 |
Method for patterning wirings of semiconductor integrated circuit device |
May 2, 1995 |
| As shown in FIG. 4, a wiring pattern of a semiconductor integrated circuit device of the present invention comprises a wiring portion extending from a connection hole and a connection portion located on the connection hole and having a matching allowance with respect to said connection h |
| 5407863 |
Method of manufacturing semiconductor device |
April 18, 1995 |
| To improve electromigration resistance and stress migration resistance, when a film is formed by depositing Al or Al alloy on a semiconductor substrate, the film is formed stepwise by stepwise changing the heating temperature of the semiconductor substrate at at least two stages. |
| 5266526 |
Method of forming trench buried wiring for semiconductor device |
November 30, 1993 |
| A method of forming a trench buried wiring on a semiconductor device. The method includes the steps of: forming a trench in a first insulating film formed on a semiconductor substrate, by using as a mask a photoresist layer, the trench having substantially an upright step; depositing a f |
| 5261998 |
Method for detecting an end point of etching in semiconductor manufacture using the emission spe |
November 16, 1993 |
| For dry-etching a material such as an aluminum alloy layer, a helium gas is added to an etching gas to detect an end point of etching in the material. When the dry-etching of the material has been completed, an emission spectrum intensity of helium having a single peak occurs. |
| 5175115 |
Method of controlling metal thin film formation conditions |
December 29, 1992 |
| Measurement of temperature - internal stress characteristics of an Al thin film formed on an Si substrate is performed. The amount of an impurity or impurities mixed in the thin f ilm can be obtained in accordance with the measured characteristics. A migration start temperature of Al ato |
| 5169407 |
Method of determining end of cleaning of semiconductor manufacturing apparatus |
December 8, 1992 |
| In a method for determining an end of cleaning of a semiconductor manufacturing apparatus according to the invention, when the interior of a semiconductor substrate process chamber of the semiconductor manufacturing apparatus is cleaned by dry etching using plasma discharge, a constant |
| 5126819 |
Wiring pattern of semiconductor integrated circuit device |
June 30, 1992 |
| As shown in FIG. 4, a wiring pattern of a semiconductor integrated circuit device of the present invention comprises a wiring portion extending from a connection hole and a connection portion located on the connection hole and having a matching allowance with respect to said connection h |
| 5103287 |
Multi-layered wiring structure of semiconductor integrated circuit device |
April 7, 1992 |
| An insulation film is formed on a semiconductor substrate in which semiconductor elements are formed. A plurality of wiring layers and interlaid insulation films are alternately laminated on the insulation film. The design margins of the laminated wiring layers and via holes formed i |
| 5100476 |
Method and apparatus for cleaning semiconductor devices |
March 31, 1992 |
| An apparatus for cleaning semiconductor devices has a mixing section for mixing a chemical solution with pure water. A semiconductor substrate to be cleaned is placed on a support. An ultrasonic generator applies ultrasonic vibrations to the supplied pure water. The mixing section mixes |
| 5055906 |
Semiconductor device having a composite insulating interlayer |
October 8, 1991 |
| A semiconductor device has a first interconnection pattern formed on a semiconductor substrate, and a second interconnection pattern located in and over a through hole formed at a composite insulating layer structure. The composite insulating layer structure is constituted by a first |
| 5044311 |
Plasma chemical vapor deposition apparatus |
September 3, 1991 |
| A plasma chemical vapor deposition apparatus comprises a reaction chamber, electrodes provided in the reaction chamber and a side wall constituting part of the reaction chamber and having a wafer access opening, at least the side wall having its surface portion covered with an insulating |
| 5016663 |
Method of determining end of cleaning of semiconductor manufacturing apparatus |
May 21, 1991 |
| In a method for determining an end of cleaning of a semiconductor manufacturing apparatus according to the invention, when the interior of a semiconductor substrate process chamber of the semiconductor manufacturing apparatus is cleaned by dry etching using plasma discharge, a constant |
| 4993939 |
Burner with a cylindrical body |
February 19, 1991 |
| A burner for directly flaming steel making materials to accomplish reduction without oxidation, wherein the burner comprises a plurality of combustion air outlets spaced circumferentially of the inner wall of a tubular burner tile, and fuel gas outlets disposed centrally of the burner |
| 4971553 |
Burner with a cylindrical body |
November 20, 1990 |
| A burner for directly flaming steel making materials to accomplish reduction without oxidation, wherein the burner comprises a plurality of combustion air outlets spaced circumferentially of the inner wall of a tubular burner tile, and fuel gas outlets disposed centrally of the burner |
| 4971552 |
Burner |
November 20, 1990 |
| A burner for directly flaming steel making materials to accomplish reduction without oxidation, wherein the burner comprises a plurality of combustion air outlets spaced circumferentially of the inner wall of a tubular burner tile, and fuel gas outlets disposed centrally of the burner |
| 4971551 |
Burner with a cylindrical body |
November 20, 1990 |
| A burner for directly flaming steel making materials to accomplish reduction without oxidation, wherein the burner comprises a plurality of combustion air outlets spaced circumferentially of the inner wall of a tubular burner tile, and fuel gas outlets disposed centrally of the burner |
| 4969815 |
Burner |
November 13, 1990 |
| A burner for directly flaming steel making materials to accomplish reduction without oxidation, wherein the burner comprises a plurality of combustion air outlets spaced circumferentially of the inner wall of a tubular burner tile, and fuel gas outlets disposed centrally of the burner |
| 4952528 |
Photolithographic method for manufacturing semiconductor wiring patterns |
August 28, 1990 |
| A method for manufacturing semiconductor devices comprising the steps of forming a first wiring pattern including first and second lower layers on a semiconductor body, forming an insulation film which covers the first wiring pattern, forming a first hole of 1.5 .mu.m and a second hole o |
| 4933063 |
Sputtering device |
June 12, 1990 |
| A sputtering device includes a vacuum chamber, a target disposed in the vacuum chamber, a protection plate formed to surround the target with a space therebetween, and having an opening formed in front of the target, a substrate holder for holding a semiconductor wafer substrate and |
| 4897172 |
Sputtering chamber structure for high-frequency bias sputtering process |
January 30, 1990 |
| A sputtering chamber structure is used to effect a high-frequency bias sputtering process and includes target and semiconductor electrodes, a metal protection plate formed to surround said target and having a first opening facing the front surface of the target, and a vacuum chamber for |
| 4857141 |
Method of forming holes in semiconductor integrated circuit device |
August 15, 1989 |
| A recess is formed in the surface area of a layer-insulation film by an isotropic etching process, and a hole is formed in the recess by a first anisotropic etching process. After this, a second anisotropic etching process is effected to taper the hole to remove an edge portion at the |
| 4853760 |
Semiconductor device having insulating layer including polyimide film |
August 1, 1989 |
| A semiconductor device has a passivation layer including a polyimide film. Argon ions are implanted in the polyimide film to convert it into an electrically stable insulating film. |
| 4760995 |
Continuously treating line for steel bands having a heating furnace by directly flaming |
August 2, 1988 |
| This invention relates to a continuously treating line for a steel band, having a heating furnace by directly flaming. For heating the steel band with causing reduction, the heating furnace of directly flaming system is provided with a plurality of heating burners of reduction system whi |
| 4728627 |
Method of making multilayered interconnects using hillock studs formed by sintering |
March 1, 1988 |
| A method of manufacturing a semiconductor device comprising the steps of preparing a semiconductor substrate on which a first insulation film is formed, forming a first conductive layer on the first insulation film, forming a hillock of the first conductive layer, forming a second in |
| 4717682 |
Method of manufacturing a semiconductor device with conductive trench sidewalls |
January 5, 1988 |
| A method of manufacturing a semiconductor device, comprising the steps of sequentially forming a buried region and an epitaxial layer on a major surface of a semiconductor substrate, forming a conductive layer along an annular trench extending to the buried region, filling the annular tr |
| 4636832 |
Semiconductor device with an improved bonding section |
January 13, 1987 |
| A semiconductor device with a bonding section comprising a semiconductor substrate, a silicon layer formed on the semiconductor substrate with a first insulating layer interposed therebetween, and a bonding pad formed on the silicon layer with a second insulating layer interposed the |
| 4634496 |
Method for planarizing the surface of an interlayer insulating film in a semiconductor device |
January 6, 1987 |
| A method for planarizing the surface of an insulation layer deposited on a first interconnection layer to allow a second interconnection layer deposited thereon without causing a breakage of the second interconnection layer. This method is characterized in that at least two insulation fi |
| 4618878 |
Semiconductor device having a multilayer wiring structure using a polyimide resin |
October 21, 1986 |
| A semiconductor device having a multilayer wiring structure which comprises a semiconductor substrate, a first wiring layer deposited on said substrate, and a second wiring layer deposited on said first wiring layer with insulating layers disposed therebetween, wherein the insulating |
| 4613888 |
Semiconductor device of multilayer wiring structure |
September 23, 1986 |
| A semiconductor device is disclosed which includes a multilayer formed of a hard inorganic main insulation film and a soft subinsulation film as insulation interlayers, and a hard inorganic insulation film as a final passivation film. The final passivation film is directly deposited on t |
| 4610079 |
Method of dicing a semiconductor wafer |
September 9, 1986 |
| A method of dicing a semiconductor wafer in which a physical discontinuity is formed on the surface of the wafer on both sides of a dicing line to limit the spreading of cracks and chips generated during dicing. Thereafter, the semiconductor wafer is diced to separate the pellets. |
| 4520041 |
Method for forming metallization structure having flat surface on semiconductor substrate |
May 28, 1985 |
| A metallization structure having a substantially flat surface can be formed on a semiconductor substrate by forming first and second insulating layers on the substrate. The second insulating layer is selectively removed to form grooves therein. Then, a metallic material layer is conforma |
| 4502207 |
Wiring material for semiconductor device and method for forming wiring pattern therewith |
March 5, 1985 |
| A wiring material of a semiconductor device, which comprises aluminum as a major component and at least a surface layer of the wiring layer is alloyed with boron and silicon. A method for forming a wiring material of a semiconductor device, which comprises the steps of: forming a wiring |
| 4462856 |
System for etching a metal film on a semiconductor wafer |
July 31, 1984 |
| A system is adapted to etch an aluminium film on a semiconductor wafer into a predetermined pattern by immersing the film in an etching solution. The system comprises a voltage detecting circuit for detecting a voltage created between a platinum electrode and the aluminium film on the |
| 4404736 |
Method for manufacturing a semiconductor device of mesa type |
September 20, 1983 |
| A method for manufacturing a semiconductor device of mesa type comprises forming mesa recesses of predetermined depth around an element in the surface of a semiconductor body, forming on the back of semiconductor body a film for lessening the concentration of stress, filling glass powder |
| 4272334 |
Method of fluidification of liquid between plane parallel plates by jetting the liquid |
June 9, 1981 |
| In an electrolytic treating on a strip of metal, namely electroplating, electrolytic degreasing or any other electrolytic treatment on a strip of metal, in order to fludify the liquid between the plane parallel plate electrodes immersed inside the tank or between the plane parallel e |
