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Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Inventor:
Abe; Keiichiro
Address:
Tsukuba, JP
No. of patents:
3
Patents:












Patent Number Title Of Patent Date Issued
8014222 Control of inputs to a memory device September 6, 2011
A memory device includes a command decoder and control interface logic. One or more external inputs, such as row and column address strobes, communicate with the command decoder through the control interface logic. A control signal is also in communication with the control interface
8004920 Power saving memory apparatus, systems, and methods August 23, 2011
Some embodiments include a voltage generator to generate a voltage to apply to a line used to access a memory cell of a memory device in which the voltage is applied to the line when the memory cell is not being accessed, and a power controller to cause the voltage to change during a
7733731 Control of inputs to a memory device June 8, 2010
A memory device includes a command decoder and control interface logic. One or more external inputs, such as row and column address strobes, communicate with the command decoder through the control interface logic. A control signal is also in communication with the control interface










 
 
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