| Patent Number |
Title Of Patent |
Date Issued |
| 7579640 |
Hybrid memory device |
August 25, 2009 |
| A hybrid memory device includes a plurality of regions including a memory cell array region upon which are formed a plurality of memory cells and a logic circuit region upon which is formed a logic circuit device, and is provided with a liner oxide layer formed on a region covering the l |
| 7414314 |
Semiconductor device and manufacturing method thereof |
August 19, 2008 |
| A semiconductor device has a semiconductor substrate, a first insulating film formed on a surface of the semiconductor substrate, a first recess formed in the first insulating film, a first barrier film formed on an inner surface of the first insulating film except a top peripheral regio |
| 7408213 |
Ferroelectric memory device and method of manufacture of same |
August 5, 2008 |
| A ferroelectric memory device has a lower insulating film formed on a semiconductor substrate. A ferroelectric capacitor structure is formed on the lower insulating film. The ferroelectric capacitor structure is created by layering in order a lower electrode, ferroelectric layer and |
| 7211505 |
Production method for wiring structure of semiconductor device |
May 1, 2007 |
| In a wiring structure of a semiconductor device, dielectric tolerance of the wiring is improved by preventing diffusion of the wiring material. The wiring structure of the semiconductor device includes a first insulating film having plural grooves, plural wiring films formed protrusi |
| 7192858 |
Method of forming plug |
March 20, 2007 |
| A method of producing a semiconductor device includes, in order to electrically connect a lower layer wiring and an upper layer wiring opposite to each other with an interlayer insulation film intervening between them, a step of forming a via-hole, which exposes the lower layer wirin |
| 7144812 |
Method of forming copper wire |
December 5, 2006 |
| Cu is nitrided to form a nitride of Cu 5 on a Cu wiring layer 1. A diffusion base material layer 6 used as a diffusion source and a barrier metal layer 7, which are interdiffused with Cu, are formed on the nitride of Cu 5. With heat treatment, the Cu wiring layer 1 and the diffusion |
| 6969911 |
Wiring structure of semiconductor device and production method of the device |
November 29, 2005 |
| In a wiring structure of a semiconductor device, dielectric tolerance of the wiring is improved by preventing diffusion of the wiring material. The wiring structure of the semiconductor device includes a first insulating film having plural grooves, plural wiring films formed protrusively |
| 6967157 |
Method of forming buried wiring in semiconductor device |
November 22, 2005 |
| A method of forming buried wiring, includes the steps of forming an insulating layer having a trench on a semiconductor substrate; forming a conductive layer mainly composed of copper on the insulating layer in such a manner that the trench is filled with the conductive layer; removing a |
| 6924176 |
Method of manufacturing semiconductor device |
August 2, 2005 |
| A conductive layer which is formed on an insulative layer on a semiconductor substrate is connected to the semiconductor substrate via a through portion which passes through the insulative layer and reaches the semiconductor substrate. In a state where the conductive layer is electri |
| 6903020 |
Method of forming buried wiring in semiconductor device |
June 7, 2005 |
| A method of forming buried wiring, includes the steps of forming an insulating layer having a trench on a semiconductor substrate; forming a conductive layer mainly composed of copper on the insulating layer in such a manner that the trench is filled with the conductive layer; removing a |
| 6903008 |
Method for forming an interconnection in a semiconductor element |
June 7, 2005 |
| There is disclosed a method for forming an interconnection in the semiconductor element, including a process for forming a groove 117 on an underlying substrate so as to correspond to the designed pattern, a process for forming an underlayer to improve crystalline of an interconnecti |
| 6770560 |
Method of forming metal wiring |
August 3, 2004 |
| In a method of manufacturing a semiconductor device, a semiconductor substrate including an insulating layer is provided. A groove is formed on the insulating layer. An additive-containing barrier layer is formed on the insulating layer. A metal seed layer and a metal layer are formed on |
| 6767826 |
Method of manufacturing semiconductor device |
July 27, 2004 |
| A first insulating layer is formed on first wiring and thereafter an etching resistant film is formed thereon. A lower layer portion of a second insulating layer is formed on the etching resistant film. Upon etching for forming dummy trenches, the rate of etching of the etching resis |
| 6767812 |
Method of forming CVD titanium film |
July 27, 2004 |
| Before deposition of a CVD titanium film on a cobalt silicide layer, an element which reacts with titanium is provided in the cobalt silicide layer in advance. Thereafter, the CVD titanium film is deposited on the cobalt silicide using a titanium tetrachloride gas. |
| 6514848 |
Method for forming an interconnection in a semiconductor element |
February 4, 2003 |
| A method for forming an interconnection in a semiconductor element includes a process for forming a groove on an underlying substrate so as to correspond to the designed pattern of the interconnection. An underlayer is formed on the underlying substrate having the groove. A thin film of |
| 6498098 |
Method of forming embedded wiring in a groove in an insulating layer |
December 24, 2002 |
| According to the present invention, a semiconductor device is fabricated by: forming an insulation layer on a substrate; forming a groove in the surface of the insulation layer; forming a diffusion protection layer on the surface of the insulation layer including inside of the groove; |
| 6455430 |
Method of embedding contact hole by damascene method |
September 24, 2002 |
| A carbon film is formed over an insulating film and a contact hole is defined therein by patterning. Copper is formed over an entire surface including the contact hole and polished by chemical mechanical polishing. The polishing of the copper is terminated with the carbon film as an |
| 6103618 |
Method for forming an interconnection in a semiconductor element |
August 15, 2000 |
| A method for forming an interconnection in a semiconductor element includes a process for forming a groove on an underlying substrate so as to correspond to the designed pattern of the interconnection. An underlayer for improving crystalline orientation of the interconnection is formed o |
