Resources Contact Us Home
Semiconductor memory device having memory block configuration

Image Number 14 for United States Patent #8446765.

A semiconductor device includes a semiconductor substrate having first and second edge lines, address pads along the first edge line, and memory mats, each including normal memory blocks and a spare memory block. Each normal memory block has nonvolatile memory cells and is a unit of batch erase. The memory mats are arranged in a U-shaped area having a hollow portion facing the second edge line. The device includes column decoders arranged correspondingly to the memory mats, an analog/logic circuit arranged in the hollow portion, and a power supply pad arranged between the analog/logic circuit and the second edge line. The analog/logic circuit includes a charge pump circuit. The device further includes a first power supply interconnection supplying power supply voltage to the charge pump circuit from the power supply pad, and a second power supply interconnection supplying power supply voltage to the column decoder from the power supply pad.

  Recently Added Patents
Circuit arrangement and method for operating a circuit arrangement
Integrated circuit package system with bonding lands
Animation control apparatus, animation control method, and non-transitory computer readable recording medium
Systems and methods for port mirroring with network-scoped connection-oriented sink
Playback device, playback method, and computer program
Remote device pairing setup
  Randomly Featured Patents
Resource scheduling algorithm in packet switched networks with multiple alternate links
Urological stent therapy system and method
Electrical connector having guidance for mating
Recombinant chitinase and use thereof as a biocide
Twin-wire section in a multi-ply former
Process for producing copolycarbonate oligomer from dichloroformate
Patient monitoring device with graphical user interface
Process for the production of moldings based on polyurethanes
Operator-visible warning symbol on a coupler
Direct ignition gas burner control system with diode steering circuitry