Resources Contact Us Home
Jitter buffer control method and communication apparatus

Image Number 8 for United States Patent #8149884.

Disclosed is an apparatus comprising a jitter buffer that writes and reads packets transmitted via a packet network from a transmission node, a clock correction unit that obtains an inter-packet jitter, based on difference information between time stamp information at the time of reception of the packet on a receiving side and time stamp information attached to the packet at the time of transmission of the packet by a transmission node with regards to packets received before and after and obtains a transmission frequency and a PLL unit that receives frequency information from the clock correction unit and generates a clock of the frequency. A scheduler uses a frequency from the PLL unit as a transmission frequency to transmit a packet from the jitter buffer unit.

  Recently Added Patents
Laser receiver for detecting a relative position
System and method of verification of analog circuits
Mirac proteins
Fishing apparatus
System and method for text input with a multi-touch screen
Software self-checking systems and methods
Avirulent oncolytic herpes simplex virus strains engineered to counter the innate host response
  Randomly Featured Patents
Label dispenser with suction hold and fork member release
Light emitting element and light emitting device using the light emitting element
Lens and backlight module of display utilizing the same
Pedestal based executive chair
Polyacetal resins containing non-meltable polymer stabilizers
Luminous material for bathing scrubbers
Static random access memory (SRAM) with replica cells and a dummy cell
Crop protection products
Optical sectioning microscopy