Resources Contact Us Home
Jitter buffer control method and communication apparatus

Image Number 8 for United States Patent #8149884.

Disclosed is an apparatus comprising a jitter buffer that writes and reads packets transmitted via a packet network from a transmission node, a clock correction unit that obtains an inter-packet jitter, based on difference information between time stamp information at the time of reception of the packet on a receiving side and time stamp information attached to the packet at the time of transmission of the packet by a transmission node with regards to packets received before and after and obtains a transmission frequency and a PLL unit that receives frequency information from the clock correction unit and generates a clock of the frequency. A scheduler uses a frequency from the PLL unit as a transmission frequency to transmit a packet from the jitter buffer unit.

  Recently Added Patents
Media identification system with fingerprint database balanced according to search loads
Method and composition for improving skin barrier function
Proximity sensor arrangement in a mobile device
Lighting fixture
Error recovery storage along a memory string
Virtual billboards
High performance adaptive switched LED driver
  Randomly Featured Patents
Process for making detergent granules by neutralization of sulphonic acids
Sealer from asphalt and pitch
Optical waveguide device, method of manufacturing the same, and optical communication equipment
Cat toy
Method and apparatus for speech processing incorporating user intent
Processing system
System and methods for capturing structure of data models using entity patterns
Combination collapsible chair and walker device
Curtain rod support
Methods and apparatus for reducing protein content in sperm cell extenders