Resources Contact Us Home
Jitter buffer control method and communication apparatus

Image Number 8 for United States Patent #8149884.

Disclosed is an apparatus comprising a jitter buffer that writes and reads packets transmitted via a packet network from a transmission node, a clock correction unit that obtains an inter-packet jitter, based on difference information between time stamp information at the time of reception of the packet on a receiving side and time stamp information attached to the packet at the time of transmission of the packet by a transmission node with regards to packets received before and after and obtains a transmission frequency and a PLL unit that receives frequency information from the clock correction unit and generates a clock of the frequency. A scheduler uses a frequency from the PLL unit as a transmission frequency to transmit a packet from the jitter buffer unit.

  Recently Added Patents
Reuse of static image data from prior image frames to reduce rasterization requirements
Polyester resin for toner, electrostatic charge image developing toner, electrostatic charge image developer, toner cartridge, process cartridge, image forming apparatus, and image forming met
Real-time demand prediction in a fast service restaurant environment
Packet communication system and packet communication method, and node and user device
Acoustic reconfiguration devices and methods
Systems and methods for unchoked control of gas turbine fuel gas control valves
Head shield
  Randomly Featured Patents
Beverage holder
Semiconductor integrated circuit device
Method and system for downlink transmission scheduling in multi-carrier networks
Automatic vehicle location systems
Crystal grain diffusion barrier structure for a semiconductor device
Displayable indicia box
Computer-implemented method and system for precise temperature control of a device under test
Fiber optic liquid mass flow sensor and method
Adjustable wafer stage, and a method and system for performing process operations using same