Resources Contact Us Home
Memory device with buried bit line structure

Image Number 5 for United States Patent #8148770.

A memory device includes a number of memory cells and a bit line structure coupled to a group of the memory cells. The bit line structure includes an upper portion having a first width, and a lower portion having a second width, where the first width is less than the second width.

  Recently Added Patents
Semiconductor device and method of manufacturing the same
Automatic logical position adjustment of multiple screens
Power control arrangement for long term evolution time division duplex method and apparatus
Accordion bioreactor
Processing data using information embedded in a data request
Spread spectrum communication system and transmission power control method therefor
System and method for improving text input in a shorthand-on-keyboard interface
  Randomly Featured Patents
Use of mesa structures for supporting heaters on an integrated circuit
Stacked capacitor of a DRAM cell with fin-shaped electrodes having supporting layers
Printing system, method of recording images, and ink cartridge attachable to printing system
Scan control method and device
Organizational and control mechanism for spectrally-efficient management of dynamic socket waveforms
Apparatus for dampening hazardous material
Device for and a method of generating signals
Progressively stamped clip-on noise damping shim for friction assembly, and method and apparatus for producing clip-on noise damping shim
Multi deck merchandiser with horizontal air curtains
Clip for hanging picture frames