Resources Contact Us Home
Memory device with buried bit line structure

Image Number 5 for United States Patent #8148770.

A memory device includes a number of memory cells and a bit line structure coupled to a group of the memory cells. The bit line structure includes an upper portion having a first width, and a lower portion having a second width, where the first width is less than the second width.

  Recently Added Patents
Polymeric compositions including their uses and methods of production
Compression molding method and reinforced thermoplastic parts molded thereby
AIN buffer N-polar GaN HEMT profile
Portable multimedia player
Integrated touch screen
Pre and post-paid real time billing convergence system
Rapid glycopeptide optimization via neoglycosylation
  Randomly Featured Patents
Failure analysis and testing of semi-conductor devices using intelligent software on automated test equipment (ATE)
Lock-stitch needle chuck for a placket sewing machine
Multiple axis displacement sensor
Testing of integrated circuits including internal test circuitry and using token passing to select testing ports
Plasma torch with interchangeable electrode systems
Method and apparatus for producing multiple groove V-belt pulleys
Retractable point system for a dart
Lifting eye
Customer expandable modular rack mount library using expansion module units having features to join access doors and align components between units
Hair trimmer with vacuum system