Resources Contact Us Home
Memory device with buried bit line structure

Image Number 2 for United States Patent #8148770.

A memory device includes a number of memory cells and a bit line structure coupled to a group of the memory cells. The bit line structure includes an upper portion having a first width, and a lower portion having a second width, where the first width is less than the second width.

  Recently Added Patents
Method for treating wounds for mammals, wound healer compound, and method of manufacturing thereof
System and method for detecting an earth ground fault of an external power supply connected to a vehicle
Resource compatability for data centers
Human and mouse targeting peptides identified by phage display
Navigation device, navigation method, and navigation program
Method and apparatuses for solving weighted planar graphs
Stacked thin-film superlattice thermoelectric devices
  Randomly Featured Patents
Self storing blanket
Catalyst for alkylating aromatic hydrocarbons
Synthesis of anhydrous metal perchlorates
Method and apparatus for acquiring MRI data for pulse sequences with multiple phase encode directions and periodic signal modulation
Apparatus and method for orienting shock-sensitive glass plates in ultra clean rooms
Method of sterilization and electrolytic water ejecting apparatus
Bubble cap assembly in an ebullated bed reactor
Shelf anti-sagging support brace
Hockey practice device
Non-adaptive symbol error count based algorithm for CDMA reverse link outer loop power control