Resources Contact Us Home
ECC implementation in non-ECC components

Image Number 6 for United States Patent #8135935.

A method and apparatus for implementation of error correction code (ECC) checking in non-ECC-compliant components. The method includes receiving a logical address, wherein the logical address maps to first and second physical addresses of a memory. The first and second physical addresses of the memory correspond to memory locations that store data and a corresponding ECC, respectively. The method further comprises translating the logical address into the first and second physical addresses, accessing the data over a data path, separately accessing the ECC over the same data path, and checking the integrity of the data using the ECC.

  Recently Added Patents
Antimicrobial flush solutions
Cardiac chamber volume computation from contours and base plane in cardiac MR Cine images
Mobile camera localization using depth maps
Scattering spectroscopy employing hotspot-aligned nanopores
Motion blur reduction for LCD video/graphics processors
Transferring storage devices within storage device testing systems
  Randomly Featured Patents
Multi-bladed speculum for dilating a body cavity
Method of making a molded plastic component having enhanced surface finish
System and method for rasterizing images subject to orthogonal rotation
Method and apparatus for performing OPC using model curvature
Method of producing group 3 nitride substrate wafers and group 3 nitride substrate wafers
Crystalline metal-organic microporous materials
Semiconductor devices having a three-dimensional stacked structure and methods of de-skewing data therein
Patellar alignment device
Mapping SDVO functions from PCI express interface