Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Reconfigurable hardware accelerator for boolean satisfiability solver










Image Number 7 for United States Patent #8131660.

A hardware accelerator is provided for Boolean constraint propagation (BCP) using field-programmable gate arrays (FPGAs) for use in solving the Boolean satisfiability problem (SAT). An inference engine may perform implications. Block RAM (BRAM) may be used to store SAT instance information. Computation may be co-located with the BRAM memory, taking advantage of the high on-chip bandwidth and low latency of an FPGA. SAT instances may be partitioned into multiple groups that can be processed by multiple inference engines in parallel. New SAT instances can be inserted into FPGA without invoking the time-consuming FPGA re-synthesizing process.








 
 
  Recently Added Patents
Navigation system and navigation apparatus
System and method for creating, managing and trading hedge portfolios
Methods and systems for automated segmentation of dense cell populations
Device for determining the absolute angular position of the steering wheel of an electric power-assisted steering column of a motor vehicle using weighted dynamic parameters of the vehicle
Systems, methods, and media for firewall control via remote system information
Web-based system and method for video analysis
Sponge
  Randomly Featured Patents
Parachute toy
Active roll control system
Controlled stop circuit for furnaces
Tire lifting and mounting tool
Rotatably retractable image display system
Intelligent secure data manipulation apparatus and method
System for position and orientation determination of a point in space using scanning laser beams
Auxiliary power take off assembly and method
Rotating source for generating a magnetic field for use with a currency detector
Bathing suit