Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Reconfigurable hardware accelerator for boolean satisfiability solver










Image Number 3 for United States Patent #8131660.

A hardware accelerator is provided for Boolean constraint propagation (BCP) using field-programmable gate arrays (FPGAs) for use in solving the Boolean satisfiability problem (SAT). An inference engine may perform implications. Block RAM (BRAM) may be used to store SAT instance information. Computation may be co-located with the BRAM memory, taking advantage of the high on-chip bandwidth and low latency of an FPGA. SAT instances may be partitioned into multiple groups that can be processed by multiple inference engines in parallel. New SAT instances can be inserted into FPGA without invoking the time-consuming FPGA re-synthesizing process.








 
 
  Recently Added Patents
Cucumber plants with a compact growing habit
Light-emitting device
Light emitted diode
Active tags
Opioid-ketamine and norketamine codrug combinations for pain management
Method of bonding metallic members, and metallic bonded body
Method and apparatus for internet on-line insurance policy service
  Randomly Featured Patents
Substrate processing apparatus, and method for manufacturing semiconductor device
Spray compositions for inhalation therapy of bronchial disorders
Field emission arrays employing a hard mask to define column lines and another mask to define emitter tips and resistors
Methods for isolation of triptolide compounds from Tripterygium wilfordii
Method of manufacturing a liquid ink jet head
Passenger seat having occupant detector for automotive vehicle
Internally grooved heat exchanger pipe and metal bar working roll for internally grooved heat exchanger pipes
Charged particle beam apparatus, charged particle detection method, and method of manufacturing semiconductor device
Adapter for receiving rectangular beverage containers
Calcium silicate board and method of manufacture therefor