Resources Contact Us Home
Browse by: INVENTOR PATENT HOLDER PATENT NUMBER DATE
 
 
Device of processing dead pixel










Image Number 6 for United States Patent #8131111.

A dead pixel processing device is disclosed. The dead pixel processing device separates an inputted Bayer pattern image into corresponding component data; calculates the distribution (pattern) of pixels based on the median of each data; calculates a comparing value based on a component having a center pixel; outputs an external flag which informs whether there are a dead pixel and/or a hot pixel by using the comparing value; compares the values of the center pixel and adjacent pixels in the component having the center pixel; calculates a measuring value based on the center pixel; outputs an internal flag by using the measuring value; and corrects the dead pixel or the hot pixel. With the present invention, an image can be corrected by detecting a corresponding dead pixel and hot pixel.








 
 
  Recently Added Patents
Laser processing a multi-device panel
Powder for layerwise manufacturing of objects
Stain-blocking aqueous coating composition
Stable pharmaceutical composition and methods of using same
Method and system for triggering message waiting indicator delivery
Method to trace video content processed by a decoder
All-angle light emitting element having high heat dissipating efficiency
  Randomly Featured Patents
Year-round decorative lights with selectable holiday color schemes and associated methods
Indexable cutting insert
Drive method for switching power converter and apparatus using this method
Process for commerical-scale crystallization and purification of tetrakis[3-]methane for stably obtaining beta crystals thereof
Vehicle top carrier
Asymmetric balloon for endotracheal tube
Electronic ticket system, collecting terminal, service providing terminal, user terminal, electronic ticket collecting method and recording medium
Light emitting diode (LED) illumination control system and method
Heart rate variability feedback monitor system
MOSFET with asymmetrical extension implant